[PATCH v2] PCI: imx6: Support more than Gen2 speed link mode
Bjorn Helgaas
helgaas at kernel.org
Wed Jul 20 14:15:41 PDT 2022
On Wed, Jul 20, 2022 at 11:26:16AM +0800, Richard Zhu wrote:
> Support more than Gen2 speed link mode, since i.MX8MP PCIe supports up to
> Gen3 link speed.
>
> Link: https://lore.kernel.org/r/1652866528-13220-2-git-send-email-hongxing.zhu@nxp.com
> Signed-off-by: Richard Zhu <hongxing.zhu at nxp.com>
> Signed-off-by: Bjorn Helgaas <bhelgaas at google.com>
You should not post patches with my signed-off-by.
I add my signed-off-by to patches when I merge them.
I applied this to pci/ctrl/imx6, replacing the v1 patch, thanks!
> ---
> Changes from v1:
> - The Supported Link Speeds of the PCI_EXP_LNKCAP should be re-configured too.
> - When only Gen1 is enabled, refine the dev_info accordingly.
>
> ---
> drivers/pci/controller/dwc/pci-imx6.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index e1ba11dabaa8..b66876f7efe0 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -844,12 +844,12 @@ static int imx6_pcie_start_link(struct dw_pcie *pci)
> if (ret)
> goto err_reset_phy;
>
> - if (pci->link_gen == 2) {
> - /* Allow Gen2 mode after the link is up. */
> + if (pci->link_gen > 1) {
> + /* Allow faster modes after the link is up */
> dw_pcie_dbi_ro_wr_en(pci);
> tmp = dw_pcie_readl_dbi(pci, offset + PCI_EXP_LNKCAP);
> tmp &= ~PCI_EXP_LNKCAP_SLS;
> - tmp |= PCI_EXP_LNKCAP_SLS_5_0GB;
> + tmp |= pci->link_gen;
> dw_pcie_writel_dbi(pci, offset + PCI_EXP_LNKCAP, tmp);
>
> /*
> @@ -884,7 +884,7 @@ static int imx6_pcie_start_link(struct dw_pcie *pci)
> if (ret)
> goto err_reset_phy;
> } else {
> - dev_info(dev, "Link: Gen2 disabled\n");
> + dev_info(dev, "Link: Only Gen1 is enabled\n");
> }
>
> imx6_pcie->link_is_up = true;
> --
> 2.25.1
>
>
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