[PATCH v2] ARM: dts: lan966x: Cleanup flexcom3 usart pinctrl settings.

[Nicolas Ferre]

On 04/07/2022 at 15:58, Kavyasree Kotagiri wrote:
> On pcb8291, Flexcom3 usart has only tx and rx pins.
> Cleaningup usart3 pinctrl settings.
> 
> Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri at microchip.com>

Fine with me as well:
Acked-by: Nicolas Ferre <nicolas.ferre at microchip.com>

> ---
> v1 -> v2:
> - Keep both tx and rx pins into one node.
> 
>   arch/arm/boot/dts/lan966x-pcb8291.dts | 18 ++++--------------
>   1 file changed, 4 insertions(+), 14 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/lan966x-pcb8291.dts b/arch/arm/boot/dts/lan966x-pcb8291.dts
> index 3c7e3a7d6f14..d56d2054c38d 100644
> --- a/arch/arm/boot/dts/lan966x-pcb8291.dts
> +++ b/arch/arm/boot/dts/lan966x-pcb8291.dts
> @@ -19,19 +19,9 @@ aliases {
>   };
>   
>   &gpio {
> -	fc_shrd7_pins: fc_shrd7-pins {
> -		pins = "GPIO_49";
> -		function = "fc_shrd7";
> -	};
> -
> -	fc_shrd8_pins: fc_shrd8-pins {
> -		pins = "GPIO_54";
> -		function = "fc_shrd8";
> -	};
> -
> -	fc3_b_pins: fcb3-spi-pins {
> -		/* SCK, RXD, TXD */
> -		pins = "GPIO_51", "GPIO_52", "GPIO_53";
> +	fc3_b_pins: fc3-b-pins {
> +		/* RX, TX */
> +		pins = "GPIO_52", "GPIO_53";
>   		function = "fc3_b";
>   	};
>   
> @@ -53,7 +43,7 @@ &flx3 {
>   	status = "okay";
>   
>   	usart3: serial at 200 {
> -		pinctrl-0 = <&fc3_b_pins>, <&fc_shrd7_pins>, <&fc_shrd8_pins>;
> +		pinctrl-0 = <&fc3_b_pins>;
>   		pinctrl-names = "default";
>   		status = "okay";
>   	};


-- 
Nicolas Ferre