ardb/for-kernelci bisection: baseline.login on meson-gxl-s905d-p230

[Ard Biesheuvel]

On Fri, 1 Jul 2022 at 16:37, Mark Brown <broonie at kernel.org> wrote:
>
> On Fri, Jul 01, 2022 at 07:21:15AM -0700, KernelCI bot wrote:
>
> The KernelCI bot found a boot failure in Ard's test branch on at
> least meson-gxl-s905d-p230 (an arm64 platform) with
> defconfig+BIG_ENDIAN triggered by ce6caf72d162d ("arm64: head:
> avoid cache invalidation when entering with the MMU on").  I've
> left the full report below including links to things like full
> boot logs, in the failing case the kernel dies with no output (as
> might be expected for a change in early boot).
>
> > * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
> > * This automated bisection report was sent to you on the basis  *
> > * that you may be involved with the breaking commit it has      *
> > * found.  No manual investigation has been done to verify it,   *
> > * and the root cause of the problem may be somewhere else.      *
> > *                                                               *
> > * If you do send a fix, please include this trailer:            *
> > *   Reported-by: "kernelci.org bot" <bot at kernelci.org>          *
> > *                                                               *
> > * Hope this helps!                                              *
> > * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
> >
> > ardb/for-kernelci bisection: baseline.login on meson-gxl-s905d-p230
> >
> > Summary:
> >   Start:      3ed2d2fa189b2 arm64: mm: add support for WXN memory translation attribute
> >   Plain log:  https://storage.kernelci.org/ardb/for-kernelci/v5.19-rc3-44-g3ed2d2fa189b/arm64/defconfig+CONFIG_CPU_BIG_ENDIAN=y/gcc-10/lab-baylibre/baseline-meson-gxl-s905d-p230.txt
> >   HTML log:   https://storage.kernelci.org/ardb/for-kernelci/v5.19-rc3-44-g3ed2d2fa189b/arm64/defconfig+CONFIG_CPU_BIG_ENDIAN=y/gcc-10/lab-baylibre/baseline-meson-gxl-s905d-p230.html
> >   Result:     ce6caf72d162d arm64: head: avoid cache invalidation when entering with the MMU on
> >

This is quite interesting, actually, as it suggests that, on this
particular platform, we enter with the MMU enabled, as this patch
should have no effect whatsoever otherwise.