[PATCH v1 4/4] arm64/mte: Add userspace interface for enabling asymmetric mode

[Catalin Marinas]

On Thu, Jan 27, 2022 at 07:57:12PM +0000, Mark Brown wrote:
> The architecture provides an asymmetric mode for MTE where tag mismatches
> are checked asynchronously for reads but synchronously for loads. Allow
> userspace processes to select this and make it available as a default mode
> via the existing per-CPU sysfs interface.
> 
> Since there PR_MTE_TCF_ values are a bitmask (allowing the kernel to choose
> between the multiple modes) and there are no free bits adjacent to the
> existing PR_MTE_TCF_ bits the set of bits used to specify the mode becomes
> disjoint. Programs using the new interface should be aware of this and
> programs that do not use it will not see any change in behaviour.
> 
> When userspace requests two possible modes but the system default for the
> CPU is the third mode (eg, default is synchronous but userspace requests
> either asynchronous or asymmetric) the preference order is:
> 
>    ASYMM > ASYNC > SYNC
> 
> This situation is not currently possible since there are only two modes and
> it is mandatory to have a system default so there could be no ambiguity and
> there is no ABI change. The chosen order is basically arbitrary as we do not
> have a clear metric for what is better here.
> 
> If userspace requests specifically asymmetric mode via the prctl() and the
> system does not support it then we will return an error, this mirrors
> how we handle the case where userspace enables MTE on a system that does
> not support MTE at all and the behaviour that will be seen if running on
> an older kernel that does not support userspace use of asymmetric mode.
> 
> Attempts to set asymmetric mode as the default mode will result in an error
> if the system does not support it.
> 
> Signed-off-by: Mark Brown <broonie at kernel.org>

Reviewed-by: Catalin Marinas <catalin.marinas at arm.com>