[PATCH 9/9] arm64: dts: qcom: sm8450: Add LLCC/system-cache-controller node

[Sai Prakash Ranjan]

Add a DT node for Last level cache (aka. system cache) controller
which provides control over the last level cache present on SM8450
SoC.

Signed-off-by: Sai Prakash Ranjan <quic_saipraka at quicinc.com>
---
 arch/arm64/boot/dts/qcom/sm8450.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 10c25ad2d0c7..5a3d050b94f7 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -1102,6 +1102,13 @@ usb_1_dwc3: usb at a600000 {
 				phy-names = "usb2-phy", "usb3-phy";
 			};
 		};
+
+		system-cache-controller at 19200000 {
+			compatible = "qcom,sm8450-llcc";
+			reg = <0 0x19200000 0 0x580000>, <0 0x19a00000 0 0x80000>;
+			reg-names = "llcc_base", "llcc_broadcast_base";
+			interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
+		};
 	};
 
 	timer {
-- 
2.33.1