[PATCH v5 38/69] KVM: arm64: nv: Support multiple nested Stage-2 mmu structures

Marc Zyngier maz at kernel.org
Thu Jan 27 03:50:30 PST 2022


On Tue, 18 Jan 2022 11:24:04 +0000,
Ganapatrao Kulkarni <gankulkarni at os.amperecomputing.com> wrote:
> 
> 
> 
> On 30-11-2021 01:31 am, Marc Zyngier wrote:
> > +struct kvm_s2_mmu *lookup_s2_mmu(struct kvm *kvm, u64 vttbr, u64 hcr)
> > +{
> > +	bool nested_stage2_enabled = hcr & HCR_VM;
> > +	int i;
> > +
> > +	/* Don't consider the CnP bit for the vttbr match */
> > +	vttbr = vttbr & ~VTTBR_CNP_BIT;
> > +
> > +	/*
> > +	 * Two possibilities when looking up a S2 MMU context:
> > +	 *
> > +	 * - either S2 is enabled in the guest, and we need a context that
> > +         *   is S2-enabled and matches the full VTTBR (VMID+BADDR), which
> > +         *   makes it safe from a TLB conflict perspective (a broken guest
> > +         *   won't be able to generate them),
> > +	 *
> > +	 * - or S2 is disabled, and we need a context that is S2-disabled
> > +         *   and matches the VMID only, as all TLBs are tagged by VMID even
> > +         *   if S2 translation is enabled.
> 
> I think you were intended to say "if S2 translation is disabled".

Yes, absolutely. Good catch.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.



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