[PATCH 1/5] clk: stm32mp1: Split ETHCK_K into separate MUX and GATE clock

[Marek Vasut]

On 1/20/22 23:39, Marek Vasut wrote:
> On 1/20/22 23:03, Stephen Boyd wrote:
>> Quoting Marek Vasut (2022-01-18 12:29:54)
>>> The ETHCK_K are modeled as composite clock of MUX and GATE, however per
>>> STM32MP1 Reference Manual RM0436 Rev 3, Page 574, Figure 83. Peripheral
>>> clock distribution for Ethernet, ETHPTPDIV divider is attached past the
>>> ETHCK_K mux, and ETH_CLK/eth_clk_fb clock are output past ETHCKEN gate.
>>> Therefore, in case ETH_CLK/eth_clk_fb are not in use AND PTP clock are
>>> in use, ETHCKEN gate can be turned off. Current driver does not permit
>>> that, fix it.
>>>
>>> This patch converts ETHCK_K from composite clock into a ETHCKEN gate,
>>> ETHPTP_K from composite clock into ETHPTPDIV divider, and adds another
>>> NO_ID clock "ck_ker_eth" which models the ETHSRC mux and is parent clock
>>> to both ETHCK_K and ETHPTP_K. Therefore, all references to ETHCK_K and
>>> ETHPTP_K remain functional as before.
>>>
>>> [1] STM32MP1 Reference Manual RM0436 Rev 3, Page 574,
>>>      Figure 83. Peripheral clock distribution for Ethernet
>>>      
>>> https://www.st.com/resource/en/reference_manual/dm00327659-stm32mp157-advanced-armbased-32bit-mpus-stmicroelectronics.pdf 
>>>
>>>
>>> Signed-off-by: Marek Vasut <marex at denx.de>
>>> Cc: Alexandre Torgue <alexandre.torgue at foss.st.com>
>>> Cc: Christophe Roullier <christophe.roullier at foss.st.com>
>>> Cc: Gabriel Fernandez <gabriel.fernandez at foss.st.com>
>>> Cc: Patrice Chotard <patrice.chotard at foss.st.com>
>>> Cc: Patrick Delaunay <patrick.delaunay at foss.st.com>
>>> Cc: Stephen Boyd <sboyd at kernel.org>
>>> Cc: linux-clk at vger.kernel.org
>>> Cc: linux-stm32 at st-md-mailman.stormreply.com
>>> To: linux-arm-kernel at lists.infradead.org
>>> ---
>>
>> Any cover letter?
> 
> If there is a need for V2, I will send one. Admittedly, I forgot one here.
> 
>> What is the merge strategy of this patch series?
> 
> Clock bits 1/5 and 2/5 can go through clock tree, DT bits through Alex's 
> ST tree.
> 
>> Do I need to ack the patches?
> 
> I am waiting for AB/RB from ST, then they can be merged.
> 
> If you want to review the first two patches, sure, the top half of 2/5 
> is probably the most interesting part, based on your suggestion from 
> almost a year ago. The rest are clock controller hardware details.

So if you want to pick 1/5 and 2/5 via clock tree with A-B from Gabriel, 
please do.