[bootwrapper PATCH 05/13] aarch64: add mov_64 macro

Andre Przywara andre.przywara at arm.com
Tue Jan 11 06:41:49 PST 2022


On Tue, 11 Jan 2022 13:06:45 +0000
Mark Rutland <mark.rutland at arm.com> wrote:

Hi,

> In subsequent patches we'll need to load 64-bit values into GPRs before
> the CPU is in a known endianness, where we cannot use literal pools.
> 
> In preparation for that, this patch adds a new `mov_64` macro to load a
> 64-bit value into a GPR using a sequence of MOV and MOVKs, which will
> function the same regardless of the CPU's endianness.
> 
> At the same time, move the `cpuid` macro to use `mov_64` internally.
> 
> Signed-off-by: Mark Rutland <mark.rutland at arm.com>
> ---
>  arch/aarch64/common.S | 10 +++++++++-
>  1 file changed, 9 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/aarch64/common.S b/arch/aarch64/common.S
> index c7171a9..3279fa9 100644
> --- a/arch/aarch64/common.S
> +++ b/arch/aarch64/common.S
> @@ -9,9 +9,17 @@
>  
>  #include <cpu.h>
>  
> +	/* Load a 64-bit value using immediates */
> +	.macro	mov_64 dest, val
> +	mov	\dest, #(((\val) >>  0) & 0xffff)
> +	movk	\dest, #(((\val) >> 16) & 0xffff), lsl #16
> +	movk	\dest, #(((\val) >> 32) & 0xffff), lsl #32
> +	movk	\dest, #(((\val) >> 48) & 0xffff), lsl #48
> +	.endm
> +

Trusted Firmware has an (admittedly more complicated) version that only
uses as many instructions as needed, by skipping over halfwords that are
zero:
https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/tree/include/arch/aarch64/asm_macros.S#n125

Does that sound useful for us?

Cheers,
Andre

>  	/* Put MPIDR into \dest, clobber \tmp and flags */
>  	.macro cpuid dest, tmp
>  	mrs	\dest, mpidr_el1
> -	ldr	\tmp, =MPIDR_ID_BITS
> +	mov_64	\tmp, MPIDR_ID_BITS
>  	ands	\dest, \dest, \tmp
>  	.endm




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