[PATCH v2 1/2] clk: st: clkgen-fsyn: search reg within node or parent

[Stephen Boyd]

Quoting Alain Volmat (2021-12-18 13:11:56)
> In order to avoid having duplicated addresses within the DT,
> only have one unit-address per clockgen and each driver within
> the clockgen should look at the parent node (overall clockgen)
> to figure out the reg property.  Such behavior is already in
> place in other STi platform clock drivers such as clk-flexgen
> and clkgen-pll.  Keep backward compatibility by first looking
> at reg within the node before looking into the parent node.
> 
> Signed-off-by: Alain Volmat <avolmat at me.com>
> ---

Applied to clk-next