[PATCH] dt-bindings: clock: Add binding for TI clksel

Rob Herring robh at kernel.org
Tue Jan 4 14:05:30 PST 2022


On Wed, Dec 22, 2021 at 12:24 AM Tony Lindgren <tony at atomide.com> wrote:
>
> Hi,
>
> * Rob Herring <robh at kernel.org> [211221 18:13]:
> > On Fri, Dec 17, 2021 at 01:36:40PM +0200, Tony Lindgren wrote:
> > > +additionalProperties: true
> >
> > Like what properties?
> >
> > true is only used for common, incomplete schemas referenced by device
> > schemas.
>
> There is a collection of the current component clock child nodes for each
> clksel instance. I got warnings with "additionalProperties: false", but
> maybe the child clock nodes need to be somehow specified in the binding?

If everything else is a child node, then you can do:

additionalProperties:
  type: object

>
> For example, below is a sample patch for am335x CLKSEL_GFX_FCLK using a
> clksel parent node with the child nodes moved to fix warnings for
> unique_unit_address. It also has clock-output-names property added to
> avoid the node naming warnings. For the other clksel instances, they can
> be a collection of dividers, multipliers, gates and muxes.
>
> Regards,
>
> Tony
>
> 8< --------
> diff --git a/arch/arm/boot/dts/am33xx-clocks.dtsi b/arch/arm/boot/dts/am33xx-clocks.dtsi
> --- a/arch/arm/boot/dts/am33xx-clocks.dtsi
> +++ b/arch/arm/boot/dts/am33xx-clocks.dtsi
> @@ -494,20 +494,27 @@ mmc_clk: mmc_clk {
>                 clock-div = <2>;
>         };
>
> -       gfx_fclk_clksel_ck: gfx_fclk_clksel_ck at 52c {
> -               #clock-cells = <0>;
> -               compatible = "ti,mux-clock";
> -               clocks = <&dpll_core_m4_ck>, <&dpll_per_m2_ck>;
> -               ti,bit-shift = <1>;
> -               reg = <0x052c>;
> -       };
> +       clock at 52c {
> +               compatible = "ti,clksel";
> +               reg = <0x52c>;
> +               #clock-cells = <1>;
> +               #address-cells = <0>;
> +
> +               gfx_fclk_clksel_ck: clock-gfx-fclk-clksel {
> +                       #clock-cells = <0>;
> +                       compatible = "ti,mux-clock";
> +                       clock-output-names = "gfx_fclk_clksel_ck";
> +                       clocks = <&dpll_core_m4_ck>, <&dpll_per_m2_ck>;
> +                       ti,bit-shift = <1>;
> +               };
>
> -       gfx_fck_div_ck: gfx_fck_div_ck at 52c {
> -               #clock-cells = <0>;
> -               compatible = "ti,divider-clock";
> -               clocks = <&gfx_fclk_clksel_ck>;
> -               reg = <0x052c>;
> -               ti,max-div = <2>;
> +               gfx_fck_div_ck: clock-gfx-fck-div {
> +                       #clock-cells = <0>;
> +                       compatible = "ti,divider-clock";
> +                       clock-output-names = "gfx_fck_div_ck";
> +                       clocks = <&gfx_fclk_clksel_ck>;
> +                       ti,max-div = <2>;
> +               };
>         };
>
>         sysclkout_pre_ck: sysclkout_pre_ck at 700 {



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