[PATCH v9 05/10] dt-bindings: clock: Add bindings for SP7021 clock driver

qinjian[覃健] qinjian at cqplus1.com
Sun Feb 27 22:31:47 PST 2022


> > +examples:
> > +  - |
> > +    clkc: clock-controller at 9c000000 {
> > +      compatible = "sunplus,sp7021-clkc";
> > +      #clock-cells = <1>;
> > +      reg = <0x9c000000 0x280>;
> > +      clocks = <&extclk>, <&clkc PLL_SYS>;
> 
> Except the warning pointed out by Rob's bot, it looks like you feed this
> clock-controller with a clock from itself. Is there a point to express
> it in DTS at all?
 
Yes, pllsys is an internal clock, but it also as a parent clock for some other
clocks in this clock-controller.




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