[PATCH v11 18/40] arm64/sme: Implement traps and syscall handling for SME

[Catalin Marinas]

On Mon, Feb 07, 2022 at 03:20:47PM +0000, Mark Brown wrote:
> By default all SME operations in userspace will trap.  When this happens
> we allocate storage space for the SME register state, set up the SVE
> registers and disable traps.  We do not need to initialize ZA since the
> architecture guarantees that it will be zeroed when enabled and when we
> trap ZA is disabled.
> 
> On syscall we exit streaming mode if we were previously in it and ensure
> that all but the lower 128 bits of the registers are zeroed while
> preserving the state of ZA. This follows the aarch64 PCS for SME, ZA
> state is preserved over a function call and streaming mode is exited.

I'm not sure this is entirely correct about the PCS. The caller must
disable SM if the function it calls is not compatible. But it's fine for
the kernel to impose this at the ABI level.

> @@ -409,6 +415,21 @@ static void task_fpsimd_load(void)
>  			       restore_ffr);
>  	else
>  		fpsimd_load_state(&current->thread.uw.fpsimd_state);
> +
> +	/*
> +	 * If we didn't set up any SVE registers but we do have SME
> +	 * enabled for userspace then ensure the SVE registers are
> +	 * flushed since userspace can switch to streaming mode and
> +	 * view the register state without trapping.
> +	 */
> +	if (system_supports_sme() && test_thread_flag(TIF_SME) &&
> +	    !restore_sve_regs) {
> +		int sve_vq_minus_one;
> +
> +		sve_vq_minus_one = sve_vq_from_vl(task_get_sve_vl(current)) - 1;
> +		sve_set_vq(sve_vq_minus_one);
> +		sve_flush_live(true, sve_vq_minus_one);
> +	}

Shouldn't the SVE state be flushed by the hardware when switching to
streaming mode?

> +/*
> + * As per the ABI exit SME streaming mode and clear the SVE state not
> + * shared with FPSIMD on syscall entry.
> + */
> +static inline void fp_user_discard(void)
>  {
> +	/*
> +	 * If SME is active then exit streaming mode.  If ZA is active
> +	 * then flush the SVE registers but leave userspace access to
> +	 * both SVE and SME enabled, otherwise disable SME for the
> +	 * task and fall through to disabling SVE too.  This means
> +	 * that after a syscall we never have any SME register state
> +	 * to track, if this changes the KVM code will need updating.
> +	 */

By "we never have any SME register state to track" I understand that we
drop the ZA state as well which AFAICT is not the case.

> +	if (system_supports_sme() && test_thread_flag(TIF_SME)) {
> +		u64 svcr = read_sysreg_s(SYS_SVCR_EL0);
> +
> +		if (svcr & SYS_SVCR_EL0_SM_MASK)
> +			sme_smstop_sm();
> +
> +		if (!(svcr & SYS_SVCR_EL0_ZA_MASK)) {
> +			clear_thread_flag(TIF_SME);
> +			sme_user_disable();
> +		}
> +	}

-- 
Catalin