[PATCH] 3/3] ARM: dts: at91: sama7g5: Enable can0 and can1 support in sama7g5-ek
Hari Prasath
Hari.PrasathGE at microchip.com
Tue Feb 22 03:39:24 PST 2022
Enable the can0 and can1 controllers in sama7g5-ek board along with
its pin mux settings.
Signed-off-by: Hari Prasath <Hari.PrasathGE at microchip.com>
---
arch/arm/boot/dts/at91-sama7g5ek.dts | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm/boot/dts/at91-sama7g5ek.dts b/arch/arm/boot/dts/at91-sama7g5ek.dts
index ccf9e224da78..5211a8c9a19c 100644
--- a/arch/arm/boot/dts/at91-sama7g5ek.dts
+++ b/arch/arm/boot/dts/at91-sama7g5ek.dts
@@ -131,6 +131,18 @@
status = "okay";
};
+&can0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_can0_default>;
+ status = "okay";
+};
+
+&can1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_can1_default>;
+ status = "okay";
+};
+
&cpu0 {
cpu-supply = <&vddcpu>;
};
@@ -454,6 +466,19 @@
};
&pioA {
+
+ pinctrl_can0_default: can0_default {
+ pinmux = <PIN_PD12__CANTX0>,
+ <PIN_PD13__CANRX0 >;
+ bias-disable;
+ };
+
+ pinctrl_can1_default: can1_default {
+ pinmux = <PIN_PD14__CANTX1>,
+ <PIN_PD15__CANRX1 >;
+ bias-disable;
+ };
+
pinctrl_flx0_default: flx0_default {
pinmux = <PIN_PE3__FLEXCOM0_IO0>,
<PIN_PE4__FLEXCOM0_IO1>,
--
2.17.1
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