[PATCH v11 14/40] arm64/sme: Implement support for TPIDR2

[Catalin Marinas]

On Mon, Feb 07, 2022 at 03:20:43PM +0000, Mark Brown wrote:
> The Scalable Matrix Extension introduces support for a new thread specific
> data register TPIDR2 intended for use by libc. The kernel must save the
> value of TPIDR2 on context switch and should ensure that all new threads
> start off with a default value of 0. Add a field to the thread_struct to
> store TPIDR2 and context switch it with the other thread specific data.
> 
> In case there are future extensions which also use TPIDR2 we introduce
> system_supports_tpidr2() and use that rather than system_supports_sme()
> for TPIDR2 handling.
> 
> Signed-off-by: Mark Brown <broonie at kernel.org>

I think this matches the ABI per the documentation (and the subsequent
discussion we had).

Reviewed-by: Catalin Marinas <catalin.marinas at arm.com>