[PATCH 2/2] arm64: dts: imx8mm: Add support for Data Modul i.MX8M Mini eDM SBC

[Marek Vasut]

On 2/21/22 01:54, Peng Fan wrote:

[...]

>> +	pinctrl_hog_sbc: hog-sbc-grp {
>> +		fsl,pins = <
>> +			/* MEMCFG[0..2] straps */
>> +			MX8MM_IOMUXC_SD1_DATA6_GPIO2_IO8
>> 	0x40000140
>> +			MX8MM_IOMUXC_SD1_CMD_GPIO2_IO1
>> 	0x40000140
>> +			MX8MM_IOMUXC_SD1_CLK_GPIO2_IO0
>> 	0x40000140
>> +
>> +			/* BOOT_CFG[0..15] straps */
>> +			MX8MM_IOMUXC_SAI1_RXD0_GPIO4_IO2
>> 	0x40000000
>> +			MX8MM_IOMUXC_SAI1_RXD1_GPIO4_IO3
>> 	0x40000000
>> +			MX8MM_IOMUXC_SAI1_RXD2_GPIO4_IO4
>> 	0x40000000
>> +			MX8MM_IOMUXC_SAI1_RXD3_GPIO4_IO5
>> 	0x40000000
>> +			MX8MM_IOMUXC_SAI1_RXD4_GPIO4_IO6
>> 	0x40000000
>> +			MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7
>> 	0x40000000
>> +			MX8MM_IOMUXC_SAI1_RXD6_GPIO4_IO8
>> 	0x40000000
>> +			MX8MM_IOMUXC_SAI1_RXD7_GPIO4_IO9
>> 	0x40000000
>> +			MX8MM_IOMUXC_SAI1_TXD0_GPIO4_IO12
>> 	0x40000000
>> +			MX8MM_IOMUXC_SAI1_TXD1_GPIO4_IO13
>> 	0x40000000
>> +			MX8MM_IOMUXC_SAI1_TXD2_GPIO4_IO14
>> 	0x40000000
>> +			MX8MM_IOMUXC_SAI1_TXD3_GPIO4_IO15
>> 	0x40000000
>> +			MX8MM_IOMUXC_SAI1_TXD4_GPIO4_IO16
>> 	0x40000000
>> +			MX8MM_IOMUXC_SAI1_TXD5_GPIO4_IO17
>> 	0x40000000
>> +			MX8MM_IOMUXC_SAI1_TXD6_GPIO4_IO18
>> 	0x40000000
>> +			MX8MM_IOMUXC_SAI1_TXD7_GPIO4_IO19
>> 	0x40000000
>> +
>> +			/* Not connected pins */
>> +			MX8MM_IOMUXC_SAI1_MCLK_GPIO4_IO20		0x0
>> +			MX8MM_IOMUXC_SAI1_TXFS_GPIO4_IO10		0x0
>> +			MX8MM_IOMUXC_SAI1_TXC_GPIO4_IO11		0x0
>> +			MX8MM_IOMUXC_SAI1_RXFS_GPIO4_IO0		0x0
>> +			MX8MM_IOMUXC_SAI1_RXC_GPIO4_IO1			0x0
> 
> Why configure these pins if not connected?

To make sure their IOMUXC state is well defined -- in this case lowest 
drive strength, slow slew rate, no pull resistors enabled.

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