[PATCH v11 03/40] arm64: cpufeature: Always specify and use a field width for capabilities

[Catalin Marinas]

On Mon, Feb 07, 2022 at 03:20:32PM +0000, Mark Brown wrote:
> Since all the fields in the main ID registers are 4 bits wide we have up
> until now not bothered specifying the width in the code. Since we now
> wish to use this mechanism to enumerate features from the floating point
> feature registers which do not follow this pattern add a width to the
> table.  This means updating all the existing table entries but makes it
> less likely that we run into issues in future due to implicitly assuming
> a 4 bit width.
> 
> Signed-off-by: Mark Brown <broonie at kernel.org>
> Cc: Suzuki K Poulose <suzuki.poulose at arm.com>
> ---
>  arch/arm64/include/asm/cpufeature.h |   1 +
>  arch/arm64/kernel/cpufeature.c      | 167 +++++++++++++++++-----------
>  2 files changed, 102 insertions(+), 66 deletions(-)

I know it's a positive diffstat but I prefer being explicit with the
field width. So:

Reviewed-by: Catalin Marinas <catalin.marinas at arm.com>