[PATCH v6 7/8] PCI: imx6: Disable enabled clocks and regulators after link is down
Fabio Estevam
festevam at gmail.com
Tue Feb 8 02:09:40 PST 2022
Hi Richard,
On Tue, Feb 8, 2022 at 12:57 AM Richard Zhu <hongxing.zhu at nxp.com> wrote:
>
> Since i.MX PCIe doesn't support the hot-plug, and to save power
> consumption as much as possible. Return error and disable the enabled
> clocks and regulators when link is down,.
It is OK to disable clocks and regulators, but I don't think we should
return an error on dw_pcie_wait_for_link() failure.
Please check:
https://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/pci.git/commit/?h=pci/imx6&id=f81f095e87715e198471f4653952fe5e3f824874
and
https://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/pci.git/commit/?h=pci/imx6&id=886a9c134755
as to why all the dwc PCI drivers should treat dw_pcie_wait_for_link()
uniformly.
>
> Add a new host_exit() callback for i.MX PCIe driver to disable the
> enabled clocks, regulators and so on in the error handling after
> host_init is finished.
>
> Signed-off-by: Richard Zhu <hongxing.zhu at nxp.com>
> ---
> drivers/pci/controller/dwc/pci-imx6.c | 30 ++++++++++++++++++++++++---
> 1 file changed, 27 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index e165ad00989c..7a7d9204c6bc 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -848,7 +848,9 @@ static int imx6_pcie_start_link(struct dw_pcie *pci)
> /* Start LTSSM. */
> imx6_pcie_ltssm_enable(dev);
>
> - dw_pcie_wait_for_link(pci);
> + ret = dw_pcie_wait_for_link(pci);
> + if (ret)
> + goto err_reset_phy;
>
> if (pci->link_gen == 2) {
> /* Allow Gen2 mode after the link is up. */
> @@ -884,7 +886,9 @@ static int imx6_pcie_start_link(struct dw_pcie *pci)
> }
>
> /* Make sure link training is finished as well! */
> - dw_pcie_wait_for_link(pci);
> + ret = dw_pcie_wait_for_link(pci);
> + if (ret)
> + goto err_reset_phy;
> } else {
> dev_info(dev, "Link: Gen2 disabled\n");
> }
> @@ -897,7 +901,6 @@ static int imx6_pcie_start_link(struct dw_pcie *pci)
> dev_dbg(dev, "PHY DEBUG_R0=0x%08x DEBUG_R1=0x%08x\n",
> dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG0),
> dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG1));
> - imx6_pcie_reset_phy(imx6_pcie);
> return ret;
> }
>
> @@ -921,8 +924,29 @@ static int imx6_pcie_host_init(struct pcie_port *pp)
> return 0;
> }
>
> +static void imx6_pcie_host_exit(struct pcie_port *pp)
> +{
> + struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
> + struct device *dev = pci->dev;
> + struct imx6_pcie *imx6_pcie = to_imx6_pcie(pci);
> +
> + imx6_pcie_reset_phy(imx6_pcie);
> + imx6_pcie_clk_disable(imx6_pcie);
> + switch (imx6_pcie->drvdata->variant) {
> + case IMX8MM:
> + if (phy_power_off(imx6_pcie->phy))
> + dev_err(dev, "unable to power off phy\n");
> + break;
> + default:
> + break;
> + }
> + if (imx6_pcie->vpcie)
> + regulator_disable(imx6_pcie->vpcie);
> +}
> +
> static const struct dw_pcie_host_ops imx6_pcie_host_ops = {
> .host_init = imx6_pcie_host_init,
> + .host_exit = imx6_pcie_host_exit,
> };
>
> static const struct dw_pcie_ops dw_pcie_ops = {
> --
> 2.25.1
>
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