[PATCH V2 4/6] dt-bindings: mailbox: imx-mu: add i.MX8 SECO MU support

Peng Fan (OSS) peng.fan at oss.nxp.com
Sun Feb 6 17:52:09 PST 2022


From: Peng Fan <peng.fan at nxp.com>

Similar to i.MX8QM/QXP SCU, i.MX8 SECO MU is dedicated for
communication between SECO and Cortex-A cores from hardware design,
it could not be reused for other purpose. To use SECO MU more
effectivly, add "fsl,imx8-mu-seco" compatile to support fast IPC.

Acked-by: Rob Herring <robh at kernel.org>
Signed-off-by: Peng Fan <peng.fan at nxp.com>
---
 Documentation/devicetree/bindings/mailbox/fsl,mu.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
index a337bcd80c4a..f865b806ae6a 100644
--- a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
+++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
@@ -28,6 +28,7 @@ properties:
       - const: fsl,imx7ulp-mu
       - const: fsl,imx8ulp-mu
       - const: fsl,imx8-mu-scu
+      - const: fsl,imx8-mu-seco
       - const: fsl,imx8ulp-mu-s4
       - items:
           - enum:
-- 
2.25.1




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