[PATCH v4] arm64: dts: imx8mp: Add Hantro G1, G2 DT nodes

[Adam Ford]

On Tue, Dec 20, 2022 at 8:56 AM Marek Vasut <marex at denx.de> wrote:
>
> Add DT nodes for the Hantro VPU found in i.MX8MP SoC.
>

I finally got some time to run fluster.  With gstreamer-1.21.3, The
following V4L2SL codecs are available.


 ./fluster.py list -c |grep -i V4L2SL
    GStreamer-H.264-V4L2SL-Gst1.0: GStreamer H.264 V4L2SL decoder for
GStreamer 1.0... ✔️
    GStreamer-H.265-V4L2SL-Gst1.0: GStreamer H.265 V4L2SL decoder for
GStreamer 1.0... ✔️
    GStreamer-VP8-V4L2SL-Gst1.0: GStreamer VP8 V4L2SL decoder for
GStreamer 1.0... ✔️
    GStreamer-VP9-V4L2SL-Gst1.0: GStreamer VP9 V4L2SL decoder for
GStreamer 1.0... ✔️

./fluster.py run -dGStreamer-H.264-V4L2SL-Gst1.0
Ran 129/135 tests successfully               in 39.306 secs

 ./fluster.py run -dGStreamer-H.265-V4L2SL-Gst1.0
Ran 126/147 tests successfully               in 154.973 secs

./fluster.py run -dGStreamer-VP9-V4L2SL-Gst1.0
Ran 130/305 tests successfully               in 170.154 secs

./fluster.py run -dGStreamer-VP8-V4L2SL-Gst1.0

Ran 55/61 tests successfully               in 5.662 secs

Each test was run using 4 threads at the stock speeds listed in this patch.

I didn't compare this to imx8MQ or imX8MM, but it does appear that the
VPU is working.

Tested-by: Adam Ford <aford173 at gmail.com>

Thanks for doing that.

adam
> Reviewed-by: Laurent Pinchart <laurent.pinchart at ideasonboard.com>
> Signed-off-by: Marek Vasut <marex at denx.de>
> ---
> Cc: Abel Vesa <abel.vesa at nxp.com>
> Cc: Adam Ford <aford173 at gmail.com>
> Cc: Alexander Stein <alexander.stein at ew.tq-group.com>
> Cc: Ezequiel Garcia <ezequiel at vanguardiasur.com.ar>
> Cc: Fabio Estevam <festevam at gmail.com>
> Cc: Jacky Bai <ping.bai at nxp.com>
> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt at linaro.org>
> Cc: Laurent Pinchart <laurent.pinchart at ideasonboard.com>
> Cc: Lucas Stach <l.stach at pengutronix.de>
> Cc: Marek Vasut <marex at denx.de>
> Cc: Markus Niebel <Markus.Niebel at ew.tq-group.com>
> Cc: NXP Linux Team <linux-imx at nxp.com>
> Cc: Peng Fan <peng.fan at nxp.com>
> Cc: Pengutronix Kernel Team <kernel at pengutronix.de>
> Cc: Richard Cochran <richardcochran at gmail.com>
> Cc: Richard Zhu <hongxing.zhu at nxp.com>
> Cc: Rob Herring <robh+dt at kernel.org>
> Cc: Sascha Hauer <s.hauer at pengutronix.de>
> Cc: Shawn Guo <shawnguo at kernel.org>
> To: linux-arm-kernel at lists.infradead.org
> ---
> V2: Drop the VC8000E
> V3: - Drop assigned-clock-rates from G1 and G2 subnodes
>     - Add RB from Laurent
> V4: - Switch to nominal clock rates, G1 and BUS are sourced from
>       VPU PLL at 600 MHz, G2 is sourced from SYS_PLL1 at 500 MHz
> ---
>  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 25 +++++++++++++++++++++++
>  1 file changed, 25 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> index 0173e394ad4d8..2349752f5ab04 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -1679,6 +1679,28 @@ gpu2d: gpu at 38008000 {
>                         power-domains = <&pgc_gpu2d>;
>                 };
>
> +               vpu_g1: video-codec at 38300000 {
> +                       compatible = "nxp,imx8mm-vpu-g1";
> +                       reg = <0x38300000 0x10000>;
> +                       interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> +                       clocks = <&clk IMX8MP_CLK_VPU_G1_ROOT>;
> +                       assigned-clocks = <&clk IMX8MP_CLK_VPU_G1>;
> +                       assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
> +                       assigned-clock-rates = <600000000>;
> +                       power-domains = <&vpumix_blk_ctrl IMX8MP_VPUBLK_PD_G1>;
> +               };
> +
> +               vpu_g2: video-codec at 38310000 {
> +                       compatible = "nxp,imx8mq-vpu-g2";
> +                       reg = <0x38310000 0x10000>;
> +                       interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> +                       clocks = <&clk IMX8MP_CLK_VPU_G2_ROOT>;
> +                       assigned-clocks = <&clk IMX8MP_CLK_VPU_G2>;
> +                       assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>;
> +                       assigned-clock-rates = <500000000>;
> +                       power-domains = <&vpumix_blk_ctrl IMX8MP_VPUBLK_PD_G2>;
> +               };
> +
>                 vpumix_blk_ctrl: blk-ctrl at 38330000 {
>                         compatible = "fsl,imx8mp-vpu-blk-ctrl", "syscon";
>                         reg = <0x38330000 0x100>;
> @@ -1690,6 +1712,9 @@ vpumix_blk_ctrl: blk-ctrl at 38330000 {
>                                  <&clk IMX8MP_CLK_VPU_G2_ROOT>,
>                                  <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>;
>                         clock-names = "g1", "g2", "vc8000e";
> +                       assigned-clocks = <&clk IMX8MP_CLK_VPU_BUS>, <&clk IMX8MP_VPU_PLL>;
> +                       assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
> +                       assigned-clock-rates = <600000000>, <600000000>;
>                         interconnects = <&noc IMX8MP_ICM_VPU_G1 &noc IMX8MP_ICN_VIDEO>,
>                                         <&noc IMX8MP_ICM_VPU_G2 &noc IMX8MP_ICN_VIDEO>,
>                                         <&noc IMX8MP_ICM_VPU_H1 &noc IMX8MP_ICN_VIDEO>;
> --
> 2.35.1
>