[PATCH v3] arm64: dts: imx8mp: Add Hantro G1, G2 DT nodes

[Marek Vasut]

Add DT nodes for the Hantro VPU found in i.MX8MP SoC.

Reviewed-by: Laurent Pinchart <laurent.pinchart at ideasonboard.com>
Signed-off-by: Marek Vasut <marex at denx.de>
---
Cc: Abel Vesa <abel.vesa at nxp.com>
Cc: Adam Ford <aford173 at gmail.com>
Cc: Alexander Stein <alexander.stein at ew.tq-group.com>
Cc: Ezequiel Garcia <ezequiel at vanguardiasur.com.ar>
Cc: Fabio Estevam <festevam at gmail.com>
Cc: Jacky Bai <ping.bai at nxp.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt at linaro.org>
Cc: Laurent Pinchart <laurent.pinchart at ideasonboard.com>
Cc: Lucas Stach <l.stach at pengutronix.de>
Cc: Marek Vasut <marex at denx.de>
Cc: Markus Niebel <Markus.Niebel at ew.tq-group.com>
Cc: NXP Linux Team <linux-imx at nxp.com>
Cc: Peng Fan <peng.fan at nxp.com>
Cc: Pengutronix Kernel Team <kernel at pengutronix.de>
Cc: Richard Cochran <richardcochran at gmail.com>
Cc: Richard Zhu <hongxing.zhu at nxp.com>
Cc: Rob Herring <robh+dt at kernel.org>
Cc: Sascha Hauer <s.hauer at pengutronix.de>
Cc: Shawn Guo <shawnguo at kernel.org>
To: linux-arm-kernel at lists.infradead.org
---
V2: Drop the VC8000E
V3: - Drop assigned-clock-rates from G1 and G2 subnodes
    - Add RB from Laurent
---
 arch/arm64/boot/dts/freescale/imx8mp.dtsi | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 34c2c80c47eb5..2927e4ea220c6 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -1639,6 +1639,26 @@ gpu2d: gpu at 38008000 {
 			power-domains = <&pgc_gpu2d>;
 		};
 
+		vpu_g1: video-codec at 38300000 {
+			compatible = "nxp,imx8mm-vpu-g1";
+			reg = <0x38300000 0x10000>;
+			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clk IMX8MP_CLK_VPU_G1_ROOT>;
+			assigned-clocks = <&clk IMX8MP_CLK_VPU_G1>;
+			assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
+			power-domains = <&vpumix_blk_ctrl IMX8MP_VPUBLK_PD_G1>;
+		};
+
+		vpu_g2: video-codec at 38310000 {
+			compatible = "nxp,imx8mq-vpu-g2";
+			reg = <0x38310000 0x10000>;
+			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clk IMX8MP_CLK_VPU_G2_ROOT>;
+			assigned-clocks = <&clk IMX8MP_CLK_VPU_G2>;
+			assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
+			power-domains = <&vpumix_blk_ctrl IMX8MP_VPUBLK_PD_G2>;
+		};
+
 		vpumix_blk_ctrl: blk-ctrl at 38330000 {
 			compatible = "fsl,imx8mp-vpu-blk-ctrl", "syscon";
 			reg = <0x38330000 0x100>;
@@ -1650,6 +1670,9 @@ vpumix_blk_ctrl: blk-ctrl at 38330000 {
 				 <&clk IMX8MP_CLK_VPU_G2_ROOT>,
 				 <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>;
 			clock-names = "g1", "g2", "vc8000e";
+			assigned-clocks = <&clk IMX8MP_CLK_VPU_BUS>;
+			assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
+			assigned-clock-rates = <700000000>;
 			interconnects = <&noc IMX8MP_ICM_VPU_G1 &noc IMX8MP_ICN_VIDEO>,
 					<&noc IMX8MP_ICM_VPU_G2 &noc IMX8MP_ICN_VIDEO>,
 					<&noc IMX8MP_ICM_VPU_H1 &noc IMX8MP_ICN_VIDEO>;
-- 
2.35.1