[PATCH v2 1/4] dt-bindings: soc: imx8mp-hsio-blk-ctrl: add clock cells

[Hongxing Zhu]

Hi Lucas:
> -----Original Message-----
> From: Lucas Stach <l.stach at pengutronix.de>
> Sent: 2022年12月16日 1:50
> To: Rob Herring <robh+dt at kernel.org>; Krzysztof Kozlowski
> <krzysztof.kozlowski+dt at linaro.org>; Shawn Guo <shawnguo at kernel.org>;
> Hongxing Zhu <hongxing.zhu at nxp.com>
> Cc: dl-linux-imx <linux-imx at nxp.com>; Pengutronix Kernel Team
> <kernel at pengutronix.de>; Marcel Ziswiler <marcel.ziswiler at toradex.com>;
> marex at denx.de; tharvey at gateworks.com; alexander.stein at ew.tq-group.com;
> richard.leitner at linux.dev; lukas at mntre.com; patchwork-lst at pengutronix.de;
> devicetree at vger.kernel.org; linux-arm-kernel at lists.infradead.org
> Subject: [PATCH v2 1/4] dt-bindings: soc: imx8mp-hsio-blk-ctrl: add clock cells
> 
> The HSIO blk-ctrl has a internal PLL, which can be used as a reference clock for
> the PCIe PHY. Add clock-cells to the binding to allow the driver to expose this
> PLL.
> 
> Signed-off-by: Lucas Stach <l.stach at pengutronix.de>
Thanks a lot for this series.
Verified on i.MX8MP EVK board when internal PLL clock mode is enabled.

Reviewed-and-Tested-by: Richard Zhu <hongxing.zhu at nxp.com>

Best Regards
Richard Zhu

> ---
> v2: fix clock-cells value
> ---
>  .../devicetree/bindings/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git
> a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml
> b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml
> index c29181a9745b..1fe68b53b1d8 100644
> ---
> a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml
> +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hsio-blk-ctrl
> +++ .yaml
> @@ -39,6 +39,9 @@ properties:
>        - const: pcie
>        - const: pcie-phy
> 
> +  '#clock-cells':
> +    const: 0
> +
>    clocks:
>      minItems: 2
>      maxItems: 2
> @@ -85,4 +88,5 @@ examples:
>          power-domain-names = "bus", "usb", "usb-phy1",
>                               "usb-phy2", "pcie", "pcie-phy";
>          #power-domain-cells = <1>;
> +        #clock-cells = <0>;
>      };
> --
> 2.30.2