[PATCH v2 2/3] dt-bindings: iio: adc: Add binding documentation for NXP IMX93 ADC
haibo.chen at nxp.com
haibo.chen at nxp.com
Wed Dec 14 05:35:38 PST 2022
From: Haibo Chen <haibo.chen at nxp.com>
The IMX93 SoC has a new ADC IP, so add binding documentation
for NXP IMX93 ADC.
Signed-off-by: Haibo Chen <haibo.chen at nxp.com>
---
.../bindings/iio/adc/nxp,imx93-adc.yaml | 79 +++++++++++++++++++
1 file changed, 79 insertions(+)
create mode 100644 Documentation/devicetree/bindings/iio/adc/nxp,imx93-adc.yaml
diff --git a/Documentation/devicetree/bindings/iio/adc/nxp,imx93-adc.yaml b/Documentation/devicetree/bindings/iio/adc/nxp,imx93-adc.yaml
new file mode 100644
index 000000000000..229bb79e255c
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/adc/nxp,imx93-adc.yaml
@@ -0,0 +1,79 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/iio/adc/nxp,imx93-adc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP iMX93 ADC bindings
+
+maintainers:
+ - Haibo Chen <haibo.chen at nxp.com>
+
+description:
+ The ADC on iMX93 is a 8-channel 12-bit 1MS/s ADC with 4 channels
+ connected to pins. it support normal and inject mode, include
+ One-Shot and Scan (continuous) conversions. Programmable DMA
+ enables for each channel Also this ADC contain alternate analog
+ watchdog thresholds, select threshold through input ports. And
+ also has Self-test logic and Software-initiated calibration.
+
+properties:
+ compatible:
+ const: nxp,imx93-adc
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ description:
+ line 0 for WDGnL (watchdog threshold) interrupt requests.
+ line 1 for WDGnH (watchdog threshold) interrupt requests.
+ line 2 for normal conversion, include EOC (End of Conversion)
+ interrupt request, ECH (End of Chain) interrupt request,
+ JEOC (End of Injected Conversion mode) interrupt request
+ and JECH (End of injected Chain) interrupt request.
+ line 3 for Self-testing Interrupts.
+ maxItems: 4
+
+ clocks:
+ maxItems: 1
+
+ vref-supply:
+ description:
+ The reference voltage which used to establish channel scaling.
+
+ "#io-channel-cells":
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+ - vref-supply
+ - "#io-channel-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/clock/imx93-clock.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ adc at 44530000 {
+ compatible = "nxp,imx93-adc";
+ reg = <0x44530000 0x10000>;
+ interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX93_CLK_ADC1_GATE>;
+ clock-names = "ipg";
+ vref-supply = <®_vref_1v8>;
+ };
+ };
+...
--
2.34.1
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