[PATCH 2/3] clk: renesas: rcar-gen4: Add support for fractional multiplication

[Geert Uytterhoeven]

On Thu, Dec 8, 2022 at 2:07 PM Geert Uytterhoeven
<geert+renesas at glider.be> wrote:
> R-Car Gen4 PLLs support fractional multiplication, which can improve
> accuracy when configuring a specific frequency.
>
> Add support for fractional multiplication to the custom clock driver
> for PLLs, which is currently used only for PLL2 on R-Car V4H.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas at glider.be>

> --- a/drivers/clk/renesas/rcar-gen4-cpg.c
> +++ b/drivers/clk/renesas/rcar-gen4-cpg.c

> @@ -101,17 +126,31 @@ static int cpg_pll_clk_set_rate(struct clk_hw *hw, unsigned long rate,
>                                 unsigned long parent_rate)
>  {
>         struct cpg_pll_clk *pll_clk = to_pll_clk(hw);
> -       unsigned int mult;
> +       unsigned long prate = parent_rate * 2;
> +       u32 cr0 = readl(pll_clk->pllcr0_reg);
> +       unsigned int ni, nf;
> +       int error;

"error" is unused, and should be dropped.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds