[PATCH 1/2] ARM: dts: imx6qdl-gw5904: add internal mdio nodes

[Fabio Estevam]

Hi Tim,

[Adding Andrew]

On Wed, Nov 30, 2022 at 9:31 PM Tim Harvey <tharvey at gateworks.com> wrote:
>
> Complete the switch definition by adding the internal mdio nodes.
>
> Signed-off-by: Tim Harvey <tharvey at gateworks.com>

> ---
>  arch/arm/boot/dts/imx6qdl-gw5904.dtsi | 35 +++++++++++++++++++++++++++
>  1 file changed, 35 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx6qdl-gw5904.dtsi b/arch/arm/boot/dts/imx6qdl-gw5904.dtsi
> index 612b6e068e28..08463e65dca3 100644
> --- a/arch/arm/boot/dts/imx6qdl-gw5904.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl-gw5904.dtsi
> @@ -212,6 +212,27 @@ switch at 0 {
>                         compatible = "marvell,mv88e6085";
>                         reg = <0>;
>
> +                       mdio {
> +                               #address-cells = <1>;
> +                               #size-cells = <0>;
> +
> +                               sw_phy0: ethernet-phy at 0 {
> +                                       reg = <0x0>;
> +                               };
> +
> +                               sw_phy1: ethernet-phy at 1 {
> +                                       reg = <0x1>;
> +                               };
> +
> +                               sw_phy2: ethernet-phy at 2 {
> +                                       reg = <0x2>;
> +                               };
> +
> +                               sw_phy3: ethernet-phy at 3 {
> +                                       reg = <0x3>;
> +                               };
> +                       };
> +
>                         ports {
>                                 #address-cells = <1>;
>                                 #size-cells = <0>;
> @@ -219,27 +240,41 @@ ports {
>                                 port at 0 {
>                                         reg = <0>;
>                                         label = "lan4";
> +                                       phy-handle = <&sw_phy0>;
> +                                       phy-mode = "internal";
>                                 };
>
>                                 port at 1 {
>                                         reg = <1>;
>                                         label = "lan3";
> +                                       phy-handle = <&sw_phy1>;
> +                                       phy-mode = "internal";
>                                 };
>
>                                 port at 2 {
>                                         reg = <2>;
>                                         label = "lan2";
> +                                       phy-handle = <&sw_phy2>;
> +                                       phy-mode = "internal";
>                                 };
>
>                                 port at 3 {
>                                         reg = <3>;
>                                         label = "lan1";
> +                                       phy-handle = <&sw_phy3>;
> +                                       phy-mode = "internal";
>                                 };
>
>                                 port at 5 {
>                                         reg = <5>;
>                                         label = "cpu";
>                                         ethernet = <&fec>;
> +                                       phy-mode = "rgmii-id";
> +
> +                                       fixed-link {
> +                                               speed = <1000>;
> +                                               full-duplex;
> +                                       };
>                                 };
>                         };
>                 };
> --
> 2.25.1
>