[PATCH 5/6] arm64: dts: imx8ulp: add mailbox node
Peng Fan (OSS)
peng.fan at oss.nxp.com
Wed Aug 31 03:00:15 PDT 2022
From: Peng Fan <peng.fan at nxp.com>
Add Sentinel (MU)Message Unit, Generic MU nodes.
Signed-off-by: Peng Fan <peng.fan at nxp.com>
---
arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 26 ++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
index abec8ad4a8de..54ccf31896b7 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
@@ -152,6 +152,15 @@ soc: soc at 0 {
#size-cells = <1>;
ranges = <0x0 0x0 0x0 0x40000000>;
+ s4muap: mailbox at 27020000 {
+ compatible = "fsl,imx8ulp-mu-s4";
+ reg = <0x27020000 0x10000>;
+ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+ #mbox-cells = <2>;
+ status = "okay";
+ };
+
+
per_bridge3: bus at 29000000 {
compatible = "simple-bus";
reg = <0x29000000 0x800000>;
@@ -159,6 +168,23 @@ per_bridge3: bus at 29000000 {
#size-cells = <1>;
ranges;
+ mu: mailbox at 29220000 {
+ compatible = "fsl,imx8ulp-mu";
+ reg = <0x29220000 0x10000>;
+ interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+ #mbox-cells = <2>;
+ status = "disabled";
+ };
+
+ mu3: mailbox at 29230000 {
+ compatible = "fsl,imx8ulp-mu";
+ reg = <0x29230000 0x10000>;
+ interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pcc3 IMX8ULP_CLK_MU3_A>;
+ #mbox-cells = <2>;
+ status = "disabled";
+ };
+
wdog3: watchdog at 292a0000 {
compatible = "fsl,imx8ulp-wdt", "fsl,imx7ulp-wdt";
reg = <0x292a0000 0x10000>;
--
2.37.1
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