[PATCH 1/4] firmware: xilinx: Add afi ioctl support

[Xu Yilun]

On 2022-08-24 at 09:25:39 +0530, Nava kishore Manne wrote:
> Adds afi ioctl to support dynamic PS-PL bus width settings.

Please also describe what is afi, PS, PL here, Patch #0 won't appear in
upstream tree finally.

Thanks,
Yilun

> 
> Signed-off-by: Nava kishore Manne <nava.kishore.manne at amd.com>
> ---
>  drivers/firmware/xilinx/zynqmp.c     | 14 +++++++++++
>  include/linux/firmware/xlnx-zynqmp.h | 36 ++++++++++++++++++++++++++++
>  2 files changed, 50 insertions(+)
> 
> diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c
> index d1f652802181..cbd84c96a66a 100644
> --- a/drivers/firmware/xilinx/zynqmp.c
> +++ b/drivers/firmware/xilinx/zynqmp.c
> @@ -843,6 +843,20 @@ int zynqmp_pm_read_pggs(u32 index, u32 *value)
>  }
>  EXPORT_SYMBOL_GPL(zynqmp_pm_read_pggs);
>  
> +/**
> + * zynqmp_pm_afi() - PM API for setting the PS-PL bus width
> + * @config_id:	Register index value
> + * @bus_width:	Afi interface bus width value.
> + *
> + * Return:	Returns status, either success or error+reason

I see other functions are also like this, but I still can't figure out
what values for success and what for error+reason.

Thanks,
Yilun

> + */
> +int zynqmp_pm_afi(u32 config_id, u32 bus_width)
> +{
> +	return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_AFI,
> +				   config_id, bus_width, NULL);
> +}
> +EXPORT_SYMBOL_GPL(zynqmp_pm_afi);
> +
>  /**
>   * zynqmp_pm_set_boot_health_status() - PM API for setting healthy boot status
>   * @value:	Status value to be written
> diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h
> index 9f50dacbf7d6..7d0d98303acc 100644
> --- a/include/linux/firmware/xlnx-zynqmp.h
> +++ b/include/linux/firmware/xlnx-zynqmp.h
> @@ -78,6 +78,16 @@
>  #define EVENT_ERROR_PSM_ERR1	(0x28108000U)
>  #define EVENT_ERROR_PSM_ERR2	(0x2810C000U)
>  
> +#define AFIFM_BUS_WIDTH_128_CONFIG_VAL	0x0U
> +#define AFIFM_BUS_WIDTH_64_CONFIG_VAL	0x1U
> +#define AFIFM_BUS_WIDTH_32_CONFIG_VAL	0x2U
> +
> +#define AFIFS_SS0_SS2_BUS_WIDTH_128_CONFIG_VAL	0x200U
> +#define AFIFS_SS0_SS2_BUS_WIDTH_64_CONFIG_VAL	0x100U
> +#define AFIFS_SS1_BUS_WIDTH_128_CONFIG_VAL	0x800U
> +#define AFIFS_SS1_BUS_WIDTH_64_CONFIG_VAL	0x400U
> +#define AFIFS_SS_BUS_WIDTH_32_CONFIG_VAL	0x0U
> +
>  enum pm_api_cb_id {
>  	PM_INIT_SUSPEND_CB = 30,
>  	PM_ACKNOWLEDGE_CB = 31,
> @@ -147,6 +157,7 @@ enum pm_ioctl_id {
>  	IOCTL_READ_PGGS = 15,
>  	/* Set healthy bit value */
>  	IOCTL_SET_BOOT_HEALTH_STATUS = 17,
> +	IOCTL_AFI = 18,
>  	IOCTL_OSPI_MUX_SELECT = 21,
>  	/* Register SGI to ATF */
>  	IOCTL_REGISTER_SGI = 25,
> @@ -155,6 +166,25 @@ enum pm_ioctl_id {
>  	IOCTL_GET_FEATURE_CONFIG = 27,
>  };
>  
> +enum pm_afi_config_id {
> +	AFIFM0_RDCTRL = 0,
> +	AFIFM0_WRCTRL = 1,
> +	AFIFM1_RDCTRL = 2,
> +	AFIFM1_WRCTRL = 3,
> +	AFIFM2_RDCTRL = 4,
> +	AFIFM2_WRCTRL = 5,
> +	AFIFM3_RDCTRL = 6,
> +	AFIFM3_WRCTRL = 7,
> +	AFIFM4_RDCTRL = 8,
> +	AFIFM4_WRCTRL = 9,
> +	AFIFM5_RDCTRL = 10,
> +	AFIFM5_WRCTRL = 11,
> +	AFIFM6_RDCTRL = 12,
> +	AFIFM6_WRCTRL = 13,
> +	AFIFS = 14,
> +	AFIFS_SS2 = 15,
> +};
> +
>  enum pm_query_id {
>  	PM_QID_INVALID = 0,
>  	PM_QID_CLOCK_GET_NAME = 1,
> @@ -475,6 +505,7 @@ int zynqmp_pm_is_function_supported(const u32 api_id, const u32 id);
>  int zynqmp_pm_set_feature_config(enum pm_feature_config_id id, u32 value);
>  int zynqmp_pm_get_feature_config(enum pm_feature_config_id id, u32 *payload);
>  int zynqmp_pm_register_sgi(u32 sgi_num, u32 reset);
> +int zynqmp_pm_afi(u32 config_id, u32 bus_width);
>  #else
>  static inline int zynqmp_pm_get_api_version(u32 *version)
>  {
> @@ -745,6 +776,11 @@ static inline int zynqmp_pm_register_sgi(u32 sgi_num, u32 reset)
>  {
>  	return -ENODEV;
>  }
> +
> +static inline int zynqmp_pm_afi(u32 config_id, u32 bus_width)
> +{
> +	return -ENODEV;
> +}
>  #endif
>  
>  #endif /* __FIRMWARE_ZYNQMP_H__ */
> -- 
> 2.25.1
>