[PATCH] arm64: dts: imx8mp: correct usb clocks

[Lucas Stach]

Am Mittwoch, dem 24.08.2022 um 16:10 +0800 schrieb Li Jun:
> After commit cf7f3f4fa9e5 ("clk: imx8mp: fix usb_root_clk parent"),
> usb_root_clk is no longer for suspend clock so update dts accordingly
> to use right bus clock and suspend clock.
> 
So who is keeping IMX8MP_CLK_USB_ROOT enabled after this change? What
is clocked by this and is it safe to disable while the USB subsystem is
in working state? I see that things may still work, due to the shared
gate with the suspend clock, but we should really try to model the DT
after the HW. Especially since this is a ABI breaking change it should
be right this time, so a unused USB_ROOT clock looks very suspicious.

Regards,
Lucas

> Signed-off-by: Li Jun <jun.li at nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> index fe178b7d063c..2f18778a057f 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -1169,7 +1169,7 @@ usb3_0: usb at 32f10100 {
>  			reg = <0x32f10100 0x8>,
>  			      <0x381f0000 0x20>;
>  			clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
> -				 <&clk IMX8MP_CLK_USB_ROOT>;
> +				 <&clk IMX8MP_CLK_USB_SUSP>;
>  			clock-names = "hsio", "suspend";
>  			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
>  			power-domains = <&hsio_blk_ctrl IMX8MP_HSIOBLK_PD_USB>;
> @@ -1182,9 +1182,9 @@ usb3_0: usb at 32f10100 {
>  			usb_dwc3_0: usb at 38100000 {
>  				compatible = "snps,dwc3";
>  				reg = <0x38100000 0x10000>;
> -				clocks = <&clk IMX8MP_CLK_HSIO_AXI>,
> +				clocks = <&clk IMX8MP_CLK_USB_ROOT>,
>  					 <&clk IMX8MP_CLK_USB_CORE_REF>,
> -					 <&clk IMX8MP_CLK_USB_ROOT>;
> +					 <&clk IMX8MP_CLK_USB_SUSP>;
>  				clock-names = "bus_early", "ref", "suspend";
>  				interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
>  				phys = <&usb3_phy0>, <&usb3_phy0>;
> @@ -1211,7 +1211,7 @@ usb3_1: usb at 32f10108 {
>  			reg = <0x32f10108 0x8>,
>  			      <0x382f0000 0x20>;
>  			clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
> -				 <&clk IMX8MP_CLK_USB_ROOT>;
> +				 <&clk IMX8MP_CLK_USB_SUSP>;
>  			clock-names = "hsio", "suspend";
>  			interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
>  			power-domains = <&hsio_blk_ctrl IMX8MP_HSIOBLK_PD_USB>;
> @@ -1224,9 +1224,9 @@ usb3_1: usb at 32f10108 {
>  			usb_dwc3_1: usb at 38200000 {
>  				compatible = "snps,dwc3";
>  				reg = <0x38200000 0x10000>;
> -				clocks = <&clk IMX8MP_CLK_HSIO_AXI>,
> +				clocks = <&clk IMX8MP_CLK_USB_ROOT>,
>  					 <&clk IMX8MP_CLK_USB_CORE_REF>,
> -					 <&clk IMX8MP_CLK_USB_ROOT>;
> +					 <&clk IMX8MP_CLK_USB_SUSP>;
>  				clock-names = "bus_early", "ref", "suspend";
>  				interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
>  				phys = <&usb3_phy1>, <&usb3_phy1>;