[PATCH v2] perf/arm_pmu_platform: Fix an error message related to dev_err_probe() usage

Christophe JAILLET christophe.jaillet at wanadoo.fr
Wed Aug 10 13:01:48 PDT 2022


Le 08/08/2022 à 16:57, Robin Murphy a écrit :
> On 2022-08-05 21:55, Christophe JAILLET wrote:
>> dev_err() is a macro that expand dev_fmt, but dev_err_probe() is a
>> function and cannot perform this macro expansion.
>>
>> So hard code the "hw perfevents: " prefix and dd a comment explaining 
>> why.
>>
>> Fixes: 11fa1dc8020a ("perf/arm_pmu_platform: Use dev_err_probe() for 
>> IRQ errors")
>> Signed-off-by: Christophe JAILLET <christophe.jaillet at wanadoo.fr>
>> ---
>> Untested, but I can't see how it could work.
>>
>> v1 --> v2
>>    - fix a typo in the comment
>> ---
>>   drivers/perf/arm_pmu_platform.c | 7 +++++--
>>   1 file changed, 5 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/perf/arm_pmu_platform.c 
>> b/drivers/perf/arm_pmu_platform.c
>> index 513de1f54e2d..02cca4b8f0fd 100644
>> --- a/drivers/perf/arm_pmu_platform.c
>> +++ b/drivers/perf/arm_pmu_platform.c
>> @@ -101,8 +101,11 @@ static int pmu_parse_irqs(struct arm_pmu *pmu)
>>       struct device *dev = &pdev->dev;
>>       num_irqs = platform_irq_count(pdev);
>> -    if (num_irqs < 0)
>> -        return dev_err_probe(dev, num_irqs, "unable to count PMU 
>> IRQs\n");
>> +    if (num_irqs < 0) {
>> +        /* dev_err_probe() does not handle dev_fmt, so hard-code the 
>> prefix */
>> +        return dev_err_probe(dev, num_irqs,
>> +                     "hw perfevents: unable to count PMU IRQs\n");
> 
> Why not use dev_fmt directly? But even better, is there any practical 
> reason why this couldn't be fixed at the source by indirecting 
> dev_err_probe() through a macro wrapper just like all its friends:
> 
> #define dev_err_probe(dev, err, fmt, ...) \
>      _dev_err_probe(dev, err, dev_fmt(fmt), ##__VA_ARGS__)
> 
> ?

Looks nice.

I'll propose it in a week or so, unless s.o. does it in the mean-time.

CJ

> 
> Thanks,
> Robin.
> 
>> +    }
>>       /*
>>        * In this case we have no idea which CPUs are covered by the PMU.
> 




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