[EXTERNAL]arm64 PCI resource allocation issue

[David Woodhouse]

On Tue, 2022-08-02 at 09:46 +0200, Ard Biesheuvel wrote:
> > If we want this, I would propose (happy to provide the implementation
> > but let's discuss the design first) something along the line of a
> > generic mechanism to "register" such a system device, which would add
> > it to a list. That list would be scanned on PCI device discovery for
> > BAR address matches, and the pci_dev/BAR# added to the entry (that or
> > put a pointer to the entry into pci_dev for speed/efficiency).
> 
> This means that bus numbers cannot be reassigned, which I don't think
> we rely on today. To positively identify a PCI device, you'll need
> some kind of path notation to avoid relying on the bus numbers
> assigned by the firmware (this could happen for hot-pluggable root
> ports where no bus range has been reserved by the firmware)

That kind of path notation already exists for the Intel IOMMU, and
probably others. See dmar_match_pci_path(), dmar_pci_bus_add_dev() etc.

It would be good to lift that out and make it generic, rather than
reinventing another version.

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