[PATCH V2 1/2] EDAC: synopsys: Add disable_intr support for V3.X Synopsys EDAC DDR

Borislav Petkov bp at alien8.de
Thu Apr 21 01:58:08 PDT 2022


> Subject: Re: [PATCH V2 1/2] EDAC: synopsys: Add disable_intr support for V3.X Synopsys EDAC DDR

EDAC tree subject prefixes are of the format:

EDAC/<driver name>: Bla...

where "Bla starts with a capital letter".

What is "disable_intr support"?

I can figure it out when looking at the code but you need to make this
human-readable. For example

"Disable the error interrupt on Synopsys EDAC v3.x hardware"

Also, is it all caps V3.X or is it simply v3.x?

On Thu, Apr 21, 2022 at 09:53:12AM +0800, Sherry Sun wrote:
> V3.X Synopsys EDAC DDR doesn't have the QOS Interrupt register, need
> to change to use the ECC Clear Register to disable the interrupts.

Not "need to change" but "change".

>From Documentation/process/submitting-patches.rst:

"Describe your changes in imperative mood, e.g. "make xyzzy do frotz"
instead of "[This patch] makes xyzzy do frotz" or "[I] changed xyzzy
to do frotz", as if you are giving orders to the codebase to change
its behaviour."

Please have a look at that document.

Thx.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette



More information about the linux-arm-kernel mailing list