[PATCH v2 2/2] ARM: Remove AES hwcap for parts affected by errata

[Ard Biesheuvel]

On Wed, 13 Apr 2022 at 19:06, James Morse <james.morse at arm.com> wrote:
>
> Cortex-A57 and Cortex-A72 have an erratum where an interrupt that
> occurs between a pair of AES instructions in aarch32 mode may corrupt
> the ELR. The task will subsequently produce the wrong AES result.
>
> The AES instructions are part of the cryptographic extensions, which are
> optional. User-space software will detect the support for these
> instructions from the hwcaps. If the platform doesn't support these
> instructions a software implementation should be used.
>
> Remove the hwcap bits on affected parts to indicate user-space should
> not use the AES instructions.
>
> Signed-off-by: James Morse <james.morse at arm.com>

Acked-by: Ard Biesheuvel <ardb at kernel.org>

> ---
>  arch/arm/kernel/setup.c | 9 +++++++++
>  1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
> index 1e8a50a97edf..8a409bfd33f2 100644
> --- a/arch/arm/kernel/setup.c
> +++ b/arch/arm/kernel/setup.c
> @@ -501,6 +501,15 @@ static void __init elf_hwcap_fixup(void)
>                 return;
>         }
>
> +       /*
> +        * HWCAP2_AES can get the wrong result due to A57's erratum #1742098 or
> +        * A72's #1655431.
> +        */
> +       if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A57 ||
> +           read_cpuid_part() == ARM_CPU_PART_CORTEX_A72) {
> +               elf_hwcap2 &= ~HWCAP2_AES;
> +       }
> +
>         /* Verify if CPUID scheme is implemented */
>         if ((id & 0x000f0000) != 0x000f0000)
>                 return;
> --
> 2.30.2
>