[PATCH] drm/tidss: Soft Reset DISPC on startup

[Tony Lindgren]

* Nishanth Menon <nm at ti.com> [220412 21:18]:
> On 17:24-20220412, Tomi Valkeinen wrote:
> > Hi,
> > 
> > On 14/03/2022 13:37, Devarsh Thakkar wrote:
> > > Soft reset the display subsystem controller on startup and wait for
> > > the reset to complete. This helps the scenario where display was
> > > already in use by some other core before the linux was booted.
> > 
> > The reason the omapdrm doesn't do a reset is that the PM features on some of
> > the DSS registers were set and controlled outside dss driver, so the dss
> > driver could not do a reset just like that. That design was carried to the
> > tidss driver, although I'm not sure if the reason is valid on AM6 and J7
> > platforms.
> > 
> > If that reasoning is not valid, this patch is ok and:
> > 
> > Reviewed-by: Tomi Valkeinen <tomi.valkeinen at ideasonboard.com>

Yeah seems OK to me for tidss, I don't think there's any other layer to
do this in a generic way for k3 devices currently.

The thing to check here is that the sysconfig register gets properly
initialized to the right state after reset. For PM, likely the syconfig
value after reset is not correct, but that can be reconfigured later on
as needed.

> Tony - sysc control for older omap devices still control this directly?

Yes, for a  reason. The reset affects the entire interconnect target
module, and disabling clockdomain autoidle needs to be considered for
enable. For omaps, the resets are handled in a generic way for all the
TI devices by ti-sysc.

With ti-sysc, the reset is done before probing dss devices on init in
sysc_init_module(). The dss related quirk handling is done in
sysc_pre_reset_quirk_dss(). If needed, we could add support for reset
framework to ti-sysc for omapdrm to call. But so far there has not been
much of a need for that, I think 8250_omap could use reset framework if
available though.

Anyways, sounds like there's no need to do a similar dss reset in
omapdrm.

Regards,

Tony