[PATCH 1/7] ARM: dts: qcom: sdx65: Add reserved memory nodes

Manivannan Sadhasivam manivannan.sadhasivam at linaro.org
Mon Apr 11 00:30:04 PDT 2022


On Mon, Apr 11, 2022 at 12:25:37PM +0530, Rohit Agarwal wrote:
> Add reserved memory nodes to the SDX65 dtsi as defined by
> the memory map.
> 
> Signed-off-by: Rohit Agarwal <quic_rohiagar at quicinc.com>
> ---
>  arch/arm/boot/dts/qcom-sdx65-mtp.dts | 21 +++++++++++++++++
>  arch/arm/boot/dts/qcom-sdx65.dtsi    | 45 ++++++++++++++++++++++++++++++++++++
>  2 files changed, 66 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/qcom-sdx65-mtp.dts b/arch/arm/boot/dts/qcom-sdx65-mtp.dts
> index ad99f56..5d51cc4 100644
> --- a/arch/arm/boot/dts/qcom-sdx65-mtp.dts
> +++ b/arch/arm/boot/dts/qcom-sdx65-mtp.dts
> @@ -23,6 +23,27 @@
>  		stdout-path = "serial0:115200n8";
>  	};
>  
> +	reserved-memory {
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		ranges;
> +
> +		mpss_dsm: mpss_dsm_region at 8c400000 {

Node name should be generic. So please use "memory@" here and below.

Thanks,
Mani

> +			no-map;
> +			reg = <0x8c400000 0x3200000>;
> +		};
> +
> +		ipa_fw_mem: ipa_fw_region at 8fced000 {
> +			no-map;
> +			reg = <0x8fced000 0x10000>;
> +		};
> +
> +		mpss_adsp_mem: mpss_adsp_region at 90800000 {
> +			no-map;
> +			reg = <0x90800000 0x10000000>;
> +		};
> +	};
> +
>  	vph_pwr: vph-pwr-regulator {
>  		compatible = "regulator-fixed";
>  		regulator-name = "vph_pwr";
> diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi
> index 7e2697f..365df74 100644
> --- a/arch/arm/boot/dts/qcom-sdx65.dtsi
> +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi
> @@ -66,6 +66,51 @@
>  			reg = <0x8fee0000 0x20000>;
>  			no-map;
>  		};
> +
> +		secdata_mem: secdata_region at 8fcfd000 {
> +			no-map;
> +			reg = <0x8fcfd000 0x1000>;
> +		};
> +
> +		hyp_mem: hyp_region at 8fd00000 {
> +			no-map;
> +			reg = <0x8fd00000 0x80000>;
> +		};
> +
> +		aop_mem: aop_regions at 8fe00000 {
> +			no-map;
> +			reg = <0x8fe00000 0x20000>;
> +		};
> +
> +		access_control_mem: access_control_region at 8fd80000 {
> +			no-map;
> +			reg = <0x8fd80000 0x80000>;
> +		};
> +
> +		smem_mem: smem_region at 8fe20000 {
> +			no-map;
> +			reg = <0x8fe20000 0xc0000>;
> +		};
> +
> +		tz_mem: tz_mem_region at 8ff00000 {
> +			no-map;
> +			reg = <0x8ff00000 0x100000>;
> +		};
> +
> +		tz_apps_mem: tz_apps_mem_region at 90000000 {
> +			no-map;
> +			reg = <0x90000000 0x500000>;
> +		};
> +
> +		tz_heap_mem: tz_heap_region at 8fcad000 {
> +			no-map;
> +			reg = <0x8fcad000 0x40000>;
> +		};
> +
> +		llcc_tcm_mem: llcc_tcm_region at 15800000 {
> +			no-map;
> +			reg = <0x15800000 0x800000>;
> +		};
>  	};
>  
>  	soc: soc {
> -- 
> 2.7.4
> 



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