[PATCH 2/2] ARM: dts: lan966x-pcb8291: Add QSPI0 and SPI NOR memory nodes

Kavyasree Kotagiri kavyasree.kotagiri at microchip.com
Thu Apr 7 03:58:35 PDT 2022


Enable QSPI0 controller and sst26vf016b SPI-NOR flash present on it.

Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri at microchip.com>
---
 arch/arm/boot/dts/lan966x-pcb8291.dts | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm/boot/dts/lan966x-pcb8291.dts b/arch/arm/boot/dts/lan966x-pcb8291.dts
index 3281af90ac6d..99d96d46661d 100644
--- a/arch/arm/boot/dts/lan966x-pcb8291.dts
+++ b/arch/arm/boot/dts/lan966x-pcb8291.dts
@@ -62,3 +62,18 @@
 &watchdog {
 	status = "okay";
 };
+
+&qspi0 {
+	status = "okay";
+
+	spi-flash at 0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <20000000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
+		m25p,fast-read;
+	};
+};
-- 
2.17.1




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