[PATCH] ARM: dts: at91: sama7g5ek: Align the impedance of the QSPI0's HSIO and PCB lines

[Tudor.Ambarus at microchip.com]

On 4/7/22 09:26, Claudiu Beznea - M18063 wrote:
> Hi, Tudor,
> 
> On 06.04.2022 16:05, Tudor Ambarus wrote:
>> The impedance of the QSPI PCB lines on the sama7g5ek is 50 Ohms.
>> Align the output impedance of the QSPI0 HSIOs by setting a medium drive
>> strength which corresponds to an impedance of 56 Ohms when VDD is in the
>> 3.0V - 3.6V range. The high drive strength setting corresponds to an
>> output impedance of 42 Ohms on the QSPI0 HSIOs.
>>
>> Suggested-by: Mihai Sain <mihai.sain at microchip.com>
>> Signed-off-by: Tudor Ambarus <tudor.ambarus at microchip.com>
> 
> Is it necessary a fixes tag here?
> 

It's not a fix per se, it's just a fine tuning that's why I chose to don't add
the fixes tag. The memory that we have populated on sama7g5ek works fine even
with high drive strength, but it's better to adjust it and use medium instead,
in case some other flashes with higher frequencies are tested. If you think a
fixes tag is needed, give me a sign and I'll resubmit.

> 
>> ---
>>  arch/arm/boot/dts/at91-sama7g5ek.dts | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/arch/arm/boot/dts/at91-sama7g5ek.dts b/arch/arm/boot/dts/at91-sama7g5ek.dts
>> index 08685a10eda1..8f9643170ba3 100644
>> --- a/arch/arm/boot/dts/at91-sama7g5ek.dts
>> +++ b/arch/arm/boot/dts/at91-sama7g5ek.dts
>> @@ -655,7 +655,7 @@ pinctrl_qspi: qspi {
>>  			 <PIN_PB21__QSPI0_INT>;
>>  		bias-disable;
>>  		slew-rate = <0>;
>> -		atmel,drive-strength = <ATMEL_PIO_DRVSTR_HI>;
>> +		atmel,drive-strength = <ATMEL_PIO_DRVSTR_ME>;
>>  	};
>>  
>>  	pinctrl_sdmmc0_default: sdmmc0_default {
>