[PATCH v2] kvm/arm64: fixed passthrough gpu into vm on arm64

Marc Zyngier maz at kernel.org
Mon Apr 4 07:47:11 PDT 2022


On Mon, 04 Apr 2022 14:24:05 +0100,
Jason Gunthorpe <jgg at ziepe.ca> wrote:
> 
> On Fri, Apr 01, 2022 at 05:48:59PM +0100, Marc Zyngier wrote:
> 
> > NAK. For a start, there is no such thing as 'write-combine' in the ARM
> > architecture, and I'm not convinced you can equate WC to Normal-NC.
> > See the previous discussion at [1].
> > 
> > [1] https://lore.kernel.org/r/20210429162906.32742-1-sdonthineni@nvidia.com
> 
> We've had a lot of discussions with ARM related to how this works with
> drivers like mlx5 that use WC.
> 
> ARM has now published some guidance on this:
> 
> https://community.arm.com/arm-research/m/resources/1012

Nicely buried where nobody would dare looking.

> 
> As an ecosystem we seem to be drifting toward Normal-NC for this
> behavior (largely because it is what Linux does). At least that is
> what we are testing and qualifing ARM CPUs against mlx5 with.
> 
> I'm guessing it will turn into a SBSA like thing where the ARM ARM is
> kind of vauge but a SOC has to implement Normal-NC in a certain way to
> be functional for the server market.

The main issue is that this equivalence isn't architected, so people
can build whatever they want. SBSA means nothing to KVM (or Linux at
large), and there is currently no way to describe which devices are
safe to map as Normal-NC vs Device.

We either have to take userspace's word for it, or rely on some other
heuristics (do this for PCIe, but not anything else). None of which
are entirely safe. Not to mention that no currently available CPU
implements FEAT_DGH.

	M.

-- 
Without deviation from the norm, progress is not possible.



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