[PATCH v3 7/8] arm64/sysreg: Generate definitions for TTBRn_EL1

Mark Brown broonie at kernel.org
Mon Apr 4 06:46:44 PDT 2022


Automatically generate definitions for accessing the TTBR0_EL1 registers,
no functional change.

Signed-off-by: Mark Brown <broonie at kernel.org>
---
 arch/arm64/include/asm/sysreg.h |  2 --
 arch/arm64/tools/sysreg         | 12 ++++++++++++
 2 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 2b5cc67b3bc3..b9023797a5b9 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -212,8 +212,6 @@
 #define SYS_ZCR_EL1			sys_reg(3, 0, 1, 2, 0)
 #define SYS_TRFCR_EL1			sys_reg(3, 0, 1, 2, 1)
 
-#define SYS_TTBR0_EL1			sys_reg(3, 0, 2, 0, 0)
-#define SYS_TTBR1_EL1			sys_reg(3, 0, 2, 0, 1)
 #define SYS_TCR_EL1			sys_reg(3, 0, 2, 0, 2)
 
 #define SYS_APIAKEYLO_EL1		sys_reg(3, 0, 2, 1, 0)
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 040745387528..f6195ccbf9b8 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -99,3 +99,15 @@ Enum	7:4	AES
 EndEnum
 Res0	3:0
 EndSysreg
+
+Sysreg	TTBR0_EL1	3	0	2	0	0
+Field	63:48	ASID
+Field	47:1	BADDR
+Field	0	CnP
+EndSysreg
+
+Sysreg	TTBR1_EL1	3	0	2	0	1
+Field	63:48	ASID
+Field	47:1	BADDR
+Field	0	CnP
+EndSysreg
-- 
2.30.2




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