[PATCH v2 1/2] soc: imx: gpcv2: Turn domain->pgc into bitfield

Marek Vasut marex at denx.de
Mon Sep 6 12:17:45 PDT 2021


On 9/6/21 8:47 PM, Lucas Stach wrote:
> Am Sonntag, dem 05.09.2021 um 02:13 +0200 schrieb Marek Vasut:
>> There is currently the MX8MM GPU domain, which is in fact a composite domain
>> for both GPU2D and GPU3D. To correctly configure this domain, it is necessary
>> to control both GPC_PGC_nCTRL(GPU_2D) and GPC_PGC_nCTRL(GPU_3D) at the same
>> time. This is currently not possible.
>>
>> Turn the domain->pgc from value into bitfield and use for_each_set_bit() to
>> iterate over all bits set in domain->pgc when configuring GPC_PGC_nCTRL
>> register array. This way it is possible to configure all GPC_PGC_nCTRL
>> registers required in a particular domain.
>>
>> This is a preparatory patch, no functional change.
> 
> Same comment as on v1 still applies: this misses the conversion of the
> i.MX8MN GPC power domains, so it's breaking this SoC. I fixed this
> patch accordingly for the version I picked up into my GPC series (v2
> and just sent v3).

I can send a V3 of this, since your series is likely gonna take a long 
time to land.



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