[PATCH 2/2] dt-bindings: mfd: add Broadcom's timer MFD block

Florian Fainelli f.fainelli at gmail.com
Fri Oct 29 14:03:11 PDT 2021


On 10/29/21 1:25 PM, Rafał Miłecki wrote:
> From: Rafał Miłecki <rafal at milecki.pl>
> 
> This block is called timer in documentation but it actually behaves like
> a MFD.
> 
> Signed-off-by: Rafał Miłecki <rafal at milecki.pl>
> ---
>  .../bindings/mfd/brcm,timer-mfd.yaml          | 64 +++++++++++++++++++
>  1 file changed, 64 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/mfd/brcm,timer-mfd.yaml
> 
> diff --git a/Documentation/devicetree/bindings/mfd/brcm,timer-mfd.yaml b/Documentation/devicetree/bindings/mfd/brcm,timer-mfd.yaml
> new file mode 100644
> index 000000000000..0060b6c443a7
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mfd/brcm,timer-mfd.yaml
> @@ -0,0 +1,64 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mfd/brcm,timer-mfd.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Broadcom's timer MFD
> +
> +maintainers:
> +  - Rafał Miłecki <rafal at milecki.pl>
> +
> +description: |
> +  Broadcom's timer is a block used in multiple SoCs (e.g., BCM4908, BCM63xx,
> +  BCM7038). Despite its name it's not strictly a timer device. It consists of:
> +  timers, watchdog and software reset handler.

Small nit here, the software reset handler part is only present on the
BCM63xx and BCM4908 (which is a derivative of 63xx) but not on the
BCM7xxx chips.

Also, there is some difference in how the registers are organized:

4908 has it that way:

TIMERCTL0
TIMERCTL1
TIMERCTL2
TIMERCNT0
TIMERCNT1
TIMERCNT2
TIMERIRQMASK
TIMERIRQSTAT
WATCHDOG_COUNT
WATCHDOG_CTL
WATCHDOG_RESET_CNT
CHIP_RESET

Whereas on STB chips it looks like this for all chips:

TIMERIS (interrupt status)
TIMERIE (interrupt enable)
TIMER0_CTRL
TIMER1_CTRL
TIMER2_CTRL
TIMER3_CTRL
TIMER0_STATUS
TIMER1_STATUS
TIMER2_STATUS
TIMER3_STATUS
WATCHDOG_COUNT
WATCHDOT_CTL
WATCHDOG_RESET_CNT
TIMERIE0 (interrupt enable the STB chip is a PCI(e) end-point)
WATCHDOG_CTRL (controls the type of event signaled: NMI, half-life etc.)

I suppose it is just more justification to have them broken out as
separate blocks given their layout looks largely the same except where
it does not.

Thanks
-- 
Florian



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