[PATCH v2 7/9] soc: mediatek: mutex: support mt8195 vppsys0/1
roy-cw.yeh
roy-cw.yeh at mediatek.com
Wed Oct 20 00:14:46 PDT 2021
From: "Roy-CW.Yeh" <roy-cw.yeh at mediatek.com>
Add mt8195 mdp mutex info to driver data of mtk-mutex
Signed-off-by: Roy-CW.Yeh <roy-cw.yeh at mediatek.com>
Acked-By: AngeloGioacchino Del Regno <angelogioacchino.delregno at collabora.com>
---
drivers/soc/mediatek/mtk-mutex.c | 53 ++++++++++++++++++++++++++++++++
1 file changed, 53 insertions(+)
diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-mutex.c
index c100a5249016..0e66b5ff916f 100644
--- a/drivers/soc/mediatek/mtk-mutex.c
+++ b/drivers/soc/mediatek/mtk-mutex.c
@@ -122,6 +122,23 @@
#define MT8183_MDP_PIPE_WPEI (MT8183_MUTEX_MDP_START + 2)
#define MT8183_MDP_PIPE_WPEI2 (MT8183_MUTEX_MDP_START + 3)
+#define MT8195_MUTEX_MDP_MOD_MASK 0xFFFFFFFF
+#define MT8195_MUTEX_MDP_MOD1_MASK 0x000000FF
+#define MT8195_MUTEX_MDP_SOF_MASK 0x00000007
+
+#define MT8195_MDP_PIPE_WPEI 0
+#define MT8195_MDP_PIPE_WPEI2 1
+#define MT8195_MDP_PIPE_RDMA0 2
+#define MT8195_MDP_PIPE_VPP1_SOUT 3
+
+#define MT8195_MDP_PIPE_RDMA1 1
+#define MT8195_MDP_PIPE_RDMA2 2
+#define MT8195_MDP_PIPE_RDMA3 3
+
+#define MT8195_MDP_PIPE_SPLIT 2
+#define MT8195_MDP_PIPE_SPLIT2 3
+#define MT8195_MDP_PIPE_VPP0_SOUT 4
+
struct mtk_mutex {
int id;
bool claimed;
@@ -266,6 +283,22 @@ static const unsigned int mt8183_mutex_mdp_offset[MDP_PIPE_MAX] = {
[MDP_PIPE_WPEI2] = MT8183_MDP_PIPE_WPEI2,
};
+static const unsigned int mt8195_mutex_vpp0_offset[MDP_PIPE_MAX] = {
+ [MDP_PIPE_WPEI] = MT8195_MDP_PIPE_WPEI,
+ [MDP_PIPE_WPEI2] = MT8195_MDP_PIPE_WPEI2,
+ [MDP_PIPE_RDMA0] = MT8195_MDP_PIPE_RDMA0,
+ [MDP_PIPE_VPP1_SOUT] = MT8195_MDP_PIPE_VPP1_SOUT,
+};
+
+static const unsigned int mt8195_mutex_vpp1_offset[MDP_PIPE_MAX] = {
+ [MDP_PIPE_SPLIT] = MT8195_MDP_PIPE_SPLIT,
+ [MDP_PIPE_SPLIT2] = MT8195_MDP_PIPE_SPLIT2,
+ [MDP_PIPE_RDMA1] = MT8195_MDP_PIPE_RDMA1,
+ [MDP_PIPE_RDMA2] = MT8195_MDP_PIPE_RDMA2,
+ [MDP_PIPE_RDMA3] = MT8195_MDP_PIPE_RDMA3,
+ [MDP_PIPE_VPP0_SOUT] = MT8195_MDP_PIPE_SPLIT,
+};
+
static const struct mtk_mutex_data mt2701_mutex_driver_data = {
.mutex_mod = mt2701_mutex_mod,
.mutex_sof = mt2712_mutex_sof,
@@ -306,6 +339,22 @@ static const struct mtk_mutex_data mt8183_mutex_driver_data = {
.no_clk = true,
};
+static const struct mtk_mutex_data mt8195_vpp0_mutex_driver_data = {
+ .mutex_mod_reg = MT8195_DISP_MUTEX0_MOD0,
+ .mutex_sof_reg = MT8195_DISP_MUTEX0_SOF,
+ .mutex_mdp_offset = mt8195_mutex_vpp0_offset,
+ .mutex_mdp_mod_mask = MT8195_MUTEX_MDP_MOD_MASK,
+ .mutex_mdp_sof_mask = MT8195_MUTEX_MDP_SOF_MASK,
+};
+
+static const struct mtk_mutex_data mt8195_vpp1_mutex_driver_data = {
+ .mutex_mod_reg = MT8195_DISP_MUTEX0_MOD0,
+ .mutex_sof_reg = MT8195_DISP_MUTEX0_SOF,
+ .mutex_mdp_offset = mt8195_mutex_vpp1_offset,
+ .mutex_mdp_mod_mask = MT8195_MUTEX_MDP_MOD_MASK,
+ .mutex_mdp_sof_mask = MT8195_MUTEX_MDP_SOF_MASK,
+};
+
struct mtk_mutex *mtk_mutex_get(struct device *dev)
{
struct mtk_mutex_ctx *mtx = dev_get_drvdata(dev);
@@ -614,6 +663,10 @@ static const struct of_device_id mutex_driver_dt_match[] = {
.data = &mt8173_mutex_driver_data},
{ .compatible = "mediatek,mt8183-disp-mutex",
.data = &mt8183_mutex_driver_data},
+ { .compatible = "mediatek,mt8195-vpp0-mutex",
+ .data = &mt8195_vpp0_mutex_driver_data},
+ { .compatible = "mediatek,mt8195-vpp1-mutex",
+ .data = &mt8195_vpp1_mutex_driver_data},
{},
};
MODULE_DEVICE_TABLE(of, mutex_driver_dt_match);
--
2.18.0
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