[PATCH 1/2] arm64: dts: Add PCIe endpoint mode DT node for ls1012a

[Leo Li]

> -----Original Message-----
> From: Z.Q. Hou <zhiqiang.hou at nxp.com>
> Sent: Tuesday, October 19, 2021 6:18 AM
> To: linux-pci at vger.kernel.org; devicetree at vger.kernel.org; linux-arm-
> kernel at lists.infradead.org; shawnguo at kernel.org; robh+dt at kernel.org; Leo
> Li <leoyang.li at nxp.com>; lorenzo.pieralisi at arm.com; kishon at ti.com
> Cc: Z.Q. Hou <zhiqiang.hou at nxp.com>
> Subject: [PATCH 1/2] arm64: dts: Add PCIe endpoint mode DT node for
> ls1012a
> 
> From: Hou Zhiqiang <Zhiqiang.Hou at nxp.com>
> 
> Add PCIe endpoint mode DT node for ls1012a and reuse the compatible
> string of ls1046a.
> 
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou at nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> index 50a72cda4727..82bf2fe6f8bd 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> @@ -545,6 +545,16 @@
>  			status = "disabled";
>  		};
> 
> +		pcie_ep1: pcie-ep at 3400000 {
> +			compatible = "fsl,ls1046a-pcie-ep","fsl,ls-pcie-ep";
> +			reg = <0x00 0x03400000 0x0 0x00100000>,
> +			      <0x40 0x00000000 0x8 0x00000000>;
> +			reg-names = "regs", "addr_space";
> +			num-ib-windows = <2>;
> +			num-ob-windows = <2>;

It looks like these properties are defined in "snps,dw-pcie-ep.yaml" instead of "layerscape-pci.txt".  Shall we add a reference to that in the binding?  Or maybe we can just reuse the snps,dw-pcie-ep.yaml binding?

> +			status = "disabled";
> +		};
> +
>  		rcpm: power-controller at 1ee2140 {
>  			compatible = "fsl,ls1012a-rcpm", "fsl,qoriq-rcpm-
> 2.1+";
>  			reg = <0x0 0x1ee2140 0x0 0x4>;
> --
> 2.17.1