[PATCH v5 4/4] perf/marvell: cn10k DDR perf event core ownership

[Bhaskara Budiredla]

>
>As DDR perf event counters are not per core, so they should be accessed only
>by one core at a time. Select new core when previously owning core is going
>offline.
>
>Signed-off-by: Bharat Bhushan <bbhushan2 at marvell.com>
>---

Reviewed-by: Bhaskara Budiredla <bbudiredla at marvell.com>