[PATCH v3 14/17] arm64: Add a capability for FEAT_ECV

[Will Deacon]

On Mon, Oct 11, 2021 at 11:56:29AM +0100, Will Deacon wrote:
> On Sun, Oct 10, 2021 at 12:43:03PM +0100, Marc Zyngier wrote:
> > Add a new capability to detect the Enhanced Counter Virtualization
> > feature (FEAT_ECV).
> > 
> > Reviewed-by: Oliver Upton <oupton at google.com>
> > Signed-off-by: Marc Zyngier <maz at kernel.org>
> > ---
> >  arch/arm64/kernel/cpufeature.c | 10 ++++++++++
> >  arch/arm64/tools/cpucaps       |  1 +
> >  2 files changed, 11 insertions(+)
> > 
> > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
> > index f8a3067d10c6..26b11ce8fff6 100644
> > --- a/arch/arm64/kernel/cpufeature.c
> > +++ b/arch/arm64/kernel/cpufeature.c
> > @@ -1926,6 +1926,16 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
> >  		.sign = FTR_UNSIGNED,
> >  		.min_field_value = 1,
> >  	},
> > +	{
> > +		.desc = "Enhanced Counter Virtualization",
> > +		.capability = ARM64_HAS_ECV,
> > +		.type = ARM64_CPUCAP_SYSTEM_FEATURE,
> > +		.matches = has_cpuid_feature,
> > +		.sys_reg = SYS_ID_AA64MMFR0_EL1,
> > +		.field_pos = ID_AA64MMFR0_ECV_SHIFT,
> > +		.sign = FTR_UNSIGNED,
> > +		.min_field_value = 1,
> > +	},
> >  #ifdef CONFIG_ARM64_PAN
> >  	{
> >  		.desc = "Privileged Access Never",
> > diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps
> > index 49305c2e6dfd..7a7c58acd8f0 100644
> > --- a/arch/arm64/tools/cpucaps
> > +++ b/arch/arm64/tools/cpucaps
> > @@ -18,6 +18,7 @@ HAS_CRC32
> >  HAS_DCPODP
> >  HAS_DCPOP
> >  HAS_E0PD
> > +HAS_ECV
> >  HAS_EPAN
> >  HAS_GENERIC_AUTH
> >  HAS_GENERIC_AUTH_ARCH
> 
> We should also make the ECV field FTR_VISIBLE.

... like you do in the last patch!

So:

Acked-by: Will Deacon <will at kernel.org>

for this one.

Will