[PATCH v5] arm64: dts: marvell: add Globalscale MOCHAbin

[Robert Marko]

On Fri, Oct 8, 2021 at 7:29 PM Pali Rohár <pali at kernel.org> wrote:
>
> On Friday 08 October 2021 17:52:40 Robert Marko wrote:
> > On Fri, Oct 8, 2021 at 3:43 PM Pali Rohár <pali at kernel.org> wrote:
> > >
> > > On Friday 08 October 2021 15:28:38 Robert Marko wrote:
> > > > > > +     cp0_pcie_reset_pins: cp0-pcie-reset-pins {
> > > > > > +             marvell,pins = "mpp9";
> > > > > > +             marvell,function = "gpio";
> > > > >
> > > > > Now I spotted this. Why is PERST# pin configured into gpio mode? Is
> > > > > there some issue that this pin in pcie mode is not working properly,
> > > > > that PCIe controller cannot handle it correctly? Or something else?
> > > >
> > > > Its because I have seen way too many broken controllers when it comes
> > > > to PERST and
> > > > other Armada 7k/8k devices are using it in GPIO mode as well.
> > > > Just look at the number of conversions back to GPIO for other
> > > > platforms as there is always some bug.
> > >
> > > I know that A3720 has broken PERST# control in PCIe block... or at least
> > > I was not able to figure out how A3720 PCIe block can control PERST#. So
> > > configuring it in gpio mode and let PERST# to be controlled manually via
> > > gpio by the software is the workaround.
> > >
> > > I just wanted to know if A7k/A8k/CN913x is also broken in the same way
> > > as A3720.
> > >
> > > Or it it just a configuration workaround for missing driver or missing
> > > proper software setup.
> > >
> > > HW bugs like this should be properly documented and not hidden behind
> > > some configuration in DTS file. And reported to HW vendors.
> >
> > I have to agree, so I did some digging.
> > I don't think that the Armada 8k PCI driver actually supports HW level PERST#.
> > I then looked at the functional specs and the only thing that looks
> > related to PERST#
> > is PCIe Software Reset Register which has a SoftWarePERst bit.
> >
> > Can you maybe look at it?
>
> Some details are in "PCIe Reset" section in Hardware Specification. In
> Software Functional Specification seems to be nothing useful. Just those
> registers without description.

It seems there are 4 bits that somehow set PCIe_Reset_out signal as
they call it.
No idea how to properly use it anyway, I will use it as a GPIO for now.

Regards,
Robert
>
> > Removed the reset-gpios and set the PERST pinmux to PCIe, and the
> > QCA9377 card will
> > show up, but I have no idea whether PERST# actually ever gets toggled.
> >
> > Regards,
> > Robert
> > --
> > Robert Marko
> > Staff Embedded Linux Engineer
> > Sartura Ltd.
> > Lendavska ulica 16a
> > 10000 Zagreb, Croatia
> > Email: robert.marko at sartura.hr
> > Web: www.sartura.hr



-- 
Robert Marko
Staff Embedded Linux Engineer
Sartura Ltd.
Lendavska ulica 16a
10000 Zagreb, Croatia
Email: robert.marko at sartura.hr
Web: www.sartura.hr