[PATCH v2 00/17] arm64: Self-hosted trace related errata workarounds

[Suzuki K Poulose]

On 08/10/2021 10:52, Will Deacon wrote:
> On Fri, Oct 08, 2021 at 10:25:03AM +0100, Suzuki K Poulose wrote:
>> Hi Will
>>
>> On 08/10/2021 08:32, Will Deacon wrote:
>>> Hi Suzuki,
>>>
>>> On Tue, Sep 21, 2021 at 02:41:04PM +0100, Suzuki K Poulose wrote:
>>>> This series adds CPU erratum work arounds related to the self-hosted
>>>> tracing. The list of affected errata handled in this series are :
>>>>
>>>>    * TRBE may overwrite trace in FILL mode
>>>>      - Arm Neoverse-N2	#2139208
>>>>      - Cortex-A710	#211985
>>>>
>>>>    * A TSB instruction may not flush the trace completely when executed
>>>>      in trace prohibited region.
>>>>
>>>>      - Arm Neoverse-N2	#2067961
>>>>      - Cortex-A710	#2054223
>>>>
>>>>    * TRBE may write to out-of-range address
>>>>      - Arm Neoverse-N2	#2253138
>>>>      - Cortex-A710	#2224489
>>>>
>>>> The series applies on the self-hosted/trbe fixes posted here [0].
>>>> A tree containing both the series is available here [1]
>>>
>>> Any chance you could put the arch/arm64/ bits at the start of the series,
>>> please? That way, I can queue them on their own branch which can be shared
>>> with the coresight tree.
>>
>> I could move the bits around. I have a question though.
>>
>> Will, Catalin, Mathieu,
>>
>> The workaround for these errata, at least two of them are
>> in the TRBE driver patches. Are we happy with enabling the Kconfig
>> entry in the kernel, without the CoreSight patches to implement the work
>> around ?
> 
> I suppose you could move all the Kconfig changes into their own patch and
> stick it right at the end in the Coresight tree.

Cool, I will do that then. Thanks. I will send the updated series.

Suzuki