[PATCH 3/5] KVM: arm64: vgic-v3: Don't advertise ICC_CTLR_EL1.SEIS

[Alexandru Elisei]

Hi Marc,

On 9/24/21 09:25, Marc Zyngier wrote:
> Since we are trapping all sysreg accesses when ICH_VTR_EL2.SEIS
> is set, and that we never deliver an SError when emulating
> any of the GICv3 sysregs, don't advertise ICC_CTLR_EL1.SEIS.

Makes sense, we don't emulate it, so don't advertise it. Checked
__vgic_v3_write_ctlr(), and we only allow the guest to modify EOI mode and which
register is responsible for determining the binary point for the interrupt priority.

Reviewed-by: Alexandru Elisei <alexandru.elisei at arm.com>

Thanks,

Alex

>
> Signed-off-by: Marc Zyngier <maz at kernel.org>
> ---
>  arch/arm64/kvm/hyp/vgic-v3-sr.c | 2 --
>  1 file changed, 2 deletions(-)
>
> diff --git a/arch/arm64/kvm/hyp/vgic-v3-sr.c b/arch/arm64/kvm/hyp/vgic-v3-sr.c
> index 39f8f7f9227c..b3b50de496a3 100644
> --- a/arch/arm64/kvm/hyp/vgic-v3-sr.c
> +++ b/arch/arm64/kvm/hyp/vgic-v3-sr.c
> @@ -987,8 +987,6 @@ static void __vgic_v3_read_ctlr(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
>  	val = ((vtr >> 29) & 7) << ICC_CTLR_EL1_PRI_BITS_SHIFT;
>  	/* IDbits */
>  	val |= ((vtr >> 23) & 7) << ICC_CTLR_EL1_ID_BITS_SHIFT;
> -	/* SEIS */
> -	val |= ((vtr >> 22) & 1) << ICC_CTLR_EL1_SEIS_SHIFT;
>  	/* A3V */
>  	val |= ((vtr >> 21) & 1) << ICC_CTLR_EL1_A3V_SHIFT;
>  	/* EOImode */