[PATCH v3 1/2] soc: imx: gpcv2: Turn domain->pgc into bitfield

Shawn Guo shawnguo at kernel.org
Mon Oct 4 00:54:25 PDT 2021


On Tue, Sep 07, 2021 at 04:38:29AM +0200, Marek Vasut wrote:
> There is currently the MX8MM GPU domain, which is in fact a composite domain
> for both GPU2D and GPU3D. To correctly configure this domain, it is necessary
> to control both GPC_PGC_nCTRL(GPU_2D) and GPC_PGC_nCTRL(GPU_3D) at the same
> time. This is currently not possible.
> 
> Turn the domain->pgc from value into bitfield and use for_each_set_bit() to
> iterate over all bits set in domain->pgc when configuring GPC_PGC_nCTRL
> register array. This way it is possible to configure all GPC_PGC_nCTRL
> registers required in a particular domain.
> 
> This is a preparatory patch, no functional change.
> 
> Reviewed-by: Peng Fan <peng.fan at nxp.com>
> Signed-off-by: Marek Vasut <marex at denx.de>
> Cc: Frieder Schrempf <frieder.schrempf at kontron.de>
> Cc: Lucas Stach <l.stach at pengutronix.de>
> Cc: NXP Linux Team <linux-imx at nxp.com>
> Cc: Peng Fan <peng.fan at nxp.com>
> Cc: Shawn Guo <shawnguo at kernel.org>

Applied both, thanks!



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