[PATCH v5 06/18] soc: imx: gpcv2: keep i.MX8M* bus clocks enabled
Lucas Stach
l.stach at pengutronix.de
Fri Oct 1 17:59:42 PDT 2021
Annotate the domains with bus clocks to keep those clocks enabled
as long as the domain is active.
Signed-off-by: Lucas Stach <l.stach at pengutronix.de>
Reviewed-by: Peng Fan <peng.fan at nxp.com>
---
drivers/soc/imx/gpcv2.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c
index c3b1d2580963..adf297c2d2af 100644
--- a/drivers/soc/imx/gpcv2.c
+++ b/drivers/soc/imx/gpcv2.c
@@ -527,6 +527,7 @@ static const struct imx_pgc_domain imx8m_pgc_domains[] = {
.hskack = IMX8M_VPU_HSK_PWRDNACKN,
},
.pgc = BIT(IMX8M_PGC_VPU),
+ .keep_clocks = true,
},
[IMX8M_POWER_DOMAIN_DISP] = {
@@ -625,6 +626,7 @@ static const struct imx_pgc_domain imx8mm_pgc_domains[] = {
.hskreq = IMX8MM_HSIO_HSK_PWRDNREQN,
.hskack = IMX8MM_HSIO_HSK_PWRDNACKN,
},
+ .keep_clocks = true,
},
[IMX8MM_POWER_DOMAIN_PCIE] = {
@@ -671,6 +673,7 @@ static const struct imx_pgc_domain imx8mm_pgc_domains[] = {
.hskack = IMX8MM_GPUMIX_HSK_PWRDNACKN,
},
.pgc = BIT(IMX8MM_PGC_GPUMIX),
+ .keep_clocks = true,
},
[IMX8MM_POWER_DOMAIN_GPU] = {
@@ -697,6 +700,7 @@ static const struct imx_pgc_domain imx8mm_pgc_domains[] = {
.hskack = IMX8MM_VPUMIX_HSK_PWRDNACKN,
},
.pgc = BIT(IMX8MM_PGC_VPUMIX),
+ .keep_clocks = true,
},
[IMX8MM_POWER_DOMAIN_VPUG1] = {
@@ -743,6 +747,7 @@ static const struct imx_pgc_domain imx8mm_pgc_domains[] = {
.hskack = IMX8MM_DISPMIX_HSK_PWRDNACKN,
},
.pgc = BIT(IMX8MM_PGC_DISPMIX),
+ .keep_clocks = true,
},
[IMX8MM_POWER_DOMAIN_MIPI] = {
@@ -810,6 +815,7 @@ static const struct imx_pgc_domain imx8mn_pgc_domains[] = {
.hskreq = IMX8MN_HSIO_HSK_PWRDNREQN,
.hskack = IMX8MN_HSIO_HSK_PWRDNACKN,
},
+ .keep_clocks = true,
},
[IMX8MN_POWER_DOMAIN_OTG1] = {
--
2.30.2
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