[RFC PATCH v3 11/29] KVM: arm64: Make ID_DFR0_EL1 writable

Reiji Watanabe reijiw at google.com
Wed Nov 24 21:33:26 PST 2021


Hi Eric,

On Wed, Nov 24, 2021 at 5:46 AM Eric Auger <eauger at redhat.com> wrote:
>
> Hi Reiji,
>
> On 11/17/21 7:43 AM, Reiji Watanabe wrote:
> > This patch adds id_reg_info for ID_DFR0_EL1 to make it writable
> > by userspace.
> >
> > Return an error if userspace tries to set PerfMon field of the
> > register to a value that conflicts with the PMU configuration.
> >
> > Signed-off-by: Reiji Watanabe <reijiw at google.com>
> > ---
> >  arch/arm64/kvm/sys_regs.c | 52 ++++++++++++++++++++++++++++++++++-----
> >  1 file changed, 46 insertions(+), 6 deletions(-)
> >
> > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
> > index 0faf458b0efb..fbd335ac5e6b 100644
> > --- a/arch/arm64/kvm/sys_regs.c
> > +++ b/arch/arm64/kvm/sys_regs.c
> > @@ -665,6 +665,27 @@ static int validate_id_aa64dfr0_el1(struct kvm_vcpu *vcpu,
> >       return 0;
> >  }
> >
> > +static int validate_id_dfr0_el1(struct kvm_vcpu *vcpu,
> > +                             const struct id_reg_info *id_reg, u64 val)
> > +{
> > +     bool vcpu_pmu, dfr0_pmu;
> > +     unsigned int perfmon;
> > +
> > +     perfmon = cpuid_feature_extract_unsigned_field(val, ID_DFR0_PERFMON_SHIFT);
> > +     if (perfmon == 1 || perfmon == 2)
> > +             /* PMUv1 or PMUv2 is not allowed on ARMv8. */
> > +             return -EINVAL;
> > +
> > +     vcpu_pmu = kvm_vcpu_has_pmu(vcpu);
> > +     dfr0_pmu = id_reg_has_pmu(val, ID_DFR0_PERFMON_SHIFT, ID_DFR0_PERFMON_8_0);
> > +
> > +     /* Check if there is a conflict with a request via KVM_ARM_VCPU_INIT */
> > +     if (vcpu_pmu ^ dfr0_pmu)
> > +             return -EPERM;
> This breaks the migration on ThunderX v2 as vcpu_pmu == true and
> dfr0_pmu == false

Yes, this is the same (incorrect) assumption as the selftest.
I will fix this as well.

Regards,
Reiji



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