[PATCH 1/2] arm/arm64: dts: Enable 2.5G Ethernet port on CN9130-CRB

Chris Packham Chris.Packham at alliedtelesis.co.nz
Mon Nov 8 17:00:12 PST 2021


Hi Gregory,

On 14/10/21 3:52 am, Gregory CLEMENT wrote:
> Hello Chris,
>
>> Enable the 2.5G Ethernet port by setting the status to "okay" and the
>> phy-mode to "2500base-x" on the cn9130-crb boards. Tested on a
>> CN9130-CRB-A.
>>
>> Signed-off-by: Chris Packham <chris.packham at alliedtelesis.co.nz>
> As I am not sure that next week the pull request will be accepted when
> you will send the v2 for the second patch, I already applied the one on
> mvebu/dt64

I pulled 
git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu.git today 
and can't see this patch. Am I looking in the right place?

> Thanks,
>
> Gregory
>
>
>> ---
>>
>> The Marvell SDK adds 2500base-t and uses it in the equivalent dtsi but
>> looking at the documentation for both the SoC and the PHY I think
>> 2500base-x is correct for the system interface (the line side is
>> 2500base-t).
>>
>>   arch/arm64/boot/dts/marvell/cn9130-crb.dtsi | 4 ++--
>>   1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
>> index 505ae69289f6..e7918f325646 100644
>> --- a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
>> +++ b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
>> @@ -214,8 +214,8 @@ &cp0_eth1 {
>>   };
>>   
>>   &cp0_eth2 {
>> -	/* This port uses "2500base-t" phy-mode */
>> -	status = "disabled";
>> +	status = "okay";
>> +	phy-mode = "2500base-x";
>>   	phy = <&nbaset_phy0>;
>>   	phys = <&cp0_comphy5 2>;
>>   };
>> -- 
>> 2.33.0
>>


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